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參數(shù)資料
| 型號(hào)： | 95P04 |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | SERIAL ACCESS SPI BUS 4K 512 x 8 EEPROM |
| 中文描述： | 串行訪問SPI總線4K的512 × 8的EEPROM |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 151K |
| 代理商： | 95P04 |
pulses. The byte address is automatically incre-
mented to the next higher address after each byte
of data is shifted out. When the highest address is
reached (1FFh), the address counter rolls over to
0h allowing the read cycle to be continued indefi-
nitely. The read operation is terminated by dese-
lecting the chip. The chip can be deselected at any
time during data output. Any read attempt during a
non-volatile write cycle will be rejected and will
deselect the chip.
Byte Write Operation
Prior to any write attempt, the write enable latch
must have been set by issuing the WREN instruc-
tion. First, the device is selected (S = low) and a
serial WREN instruction byte is issued. Then, the
product is deselected by taking S high. After the
WREN instruction byte is sent, the ST95P04 will
set the write enable latch and then remain in
standby until it is deselected. Then, the write state
is entered by selecting the chip, issuing a one byte
address (A7-A0), and one byte of data. Bit 3 of the
write instruction contains address A8 (most signifi-
cant address bit). S must remain low for the entire
duration of the operation. The product must be
deselected just after the eigth bit of data has been
latched in. If not, the write process is cancelled. As
soon as the product is deselected, the self-timed
write cycle is initiated. While the write is in progress,
the status register may be read to check BP1, BP0,
WEL and WIP. WIP is high during the self-timed
write cycle. When the cycle is close to completion,
the write enable latch is reset.
Page Write Operation
A maximum of 16 bytes of data may be written
during one non-volatile write cycle. All 16 bytes
must reside on the same page. The page write
mode is the same as the byte write mode except
that instead of deselecting after the first byte of
data, up to 15 additional bytes can be shifted in
prior to deselecting the chip. A page address begins
with address xxxx 0000 and ends with xxxx 1111.
If the address counter reaches xxxx 1111 and the
clock continues, the counter will roll over to the first
address of the page (xxxx 0000) and overwrite any
previous written data. The programming cycle will
only start if the S transition does occur at the clock
low pulse just after the eigth bit of data of a word is
received.
C
D
AI01066
S
Q
2
1
3
4
5
6
7
8
9 10 11 12 13 14 15 16 17 18 19
A
20 21 22 23
7
6
5
4
3
2
0
1
HIGH IMPEDANCE
DATA OUT
INSTRUCTION
BYTE ADDRESS
0
MSB
Figure 8. Read Operation Sequence
9/16
ST95P04
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 95PF120 | STANDARD RECOVERY DIODES GEN II DO5 |
| 95PF120W | STANDARD RECOVERY DIODES GEN II DO5 |
| 95PFR120W | STANDARD RECOVERY DIODES GEN II DO5 |
| 95PF40 | 400V 95A Std. Recovery Diode in a DO-5 package |
| 95PF80 | 800V 95A Std. Recovery Diode in a DO-5 package |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 95PF120 | 制造商:Vishay Angstrohm 功能描述:Diode Switching 1.2KV 95A 2-Pin DO-5 制造商:Vishay Semiconductors 功能描述:STANDARD DIODE 95A 1.2KV DO-203AB |
| 95PF-120 | 制造商:TRSYS 制造商全稱:Transys Electronics 功能描述:STANDARD RECOVERY DIODE |
| 95PF120W | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Standard Recovery Diodes Generation 2 DO-5 (Stud Version), 95 A |
| 95PF140 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Standard Recovery Diodes Generation 2 DO-5 (Stud Version), 95 A |
| 95PF140_12 | 制造商:VISHAY 制造商全稱:Vishay Siliconix 功能描述:Standard Recovery Diodes Generation 2 DO-5 (Stud Version), 95 A |
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