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參數資料
| 型號： | 93LCS66/P |
| 元件分類： | PROM |
| 英文描述： | 256 X 16 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-8 |
| 文件頁數： | 14/14頁 |
| 文件大?。?/td> | 182K |
| 代理商： | 93LCS66/P |
2004 Microchip Technology Inc.
DS11181E-page 9
93LCS56/66
FIGURE 2-10: PREN TIMING
FIGURE 2-11: PRCLEAR TIMING
FIGURE 2-12: PRWRITE TIMING
CLK
CS
T CSL
1
DI
X
01
PE
X
DO = TRI-STATE
A EWEN cycle must precede a PREN cycle.
PRE
0
1
6 DON'T CARE BITS
CLK
CS
TCSL
1
DI
BUSY
READY
TWC
DO
1
TRI-STATE
PE
PRE
1
11
1
A PREN cycle must immediately precede a PRCLEAR cycle.
8 BITS OF "1"
CLK
CS
TCSL
0
DI
BUSY
READY
TWC
DO
1
PE
PRE
1
A7
A0
Protect Register MUST be cleared before a PRWRITE cycle.
A PREN cycle must immediately precede a PRWRITE cycle.
Address bit A7 is a "don't care" for 93LCS56.
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