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參數(shù)資料
| 型號： | 93CX66PM |
| 英文描述： | Microwire Serial EEPROM |
| 中文描述： | 微型導(dǎo)線串行EEPROM |
| 文件頁數(shù)： | 24/24頁 |
| 文件大小： | 405K |
| 代理商： | 93CX66PM |
2003 Microchip Technology Inc.
DS21794B-page 9
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.8
WRITE
The WRITE instruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA56A/B/C and 93LC56A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C56A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical ‘0’ indicates that programming
is still in progress. DO at logical ‘1’ indicates that the
register at the specified address has been written with
the data specified and the device is ready for another
instruction.
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
FIGURE 2-8:
WRITE TIMING FOR 93AA AND 93LC DEVICES
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
CS
CLK
DI
DO
1
0
1An
A0
Dx
D0
BUSY
READY
HIGH-Z
Twc
TCSL
TCZ
TSV
CS
CLK
DI
DO
1
0
1An
A0
Dx
D0
BUSY
READY
HIGH-Z
Twc
TCSL
TCZ
TSV
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