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參數(shù)資料
| 型號： | 93C66AE/P |
| 元件分類： | PROM |
| 英文描述： | 512 X 8 MICROWIRE BUS SERIAL EEPROM, PDIP8 |
| 封裝： | 0.300 INCH, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 6/13頁 |
| 文件大?。?/td> | 102K |
| 代理商： | 93C66AE/P |
93C66A/B
DS21207C-page 2
1998 Microchip Technology Inc.
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Maximum Ratings*
VCC
...................................................................................7.0V
All inputs and outputs w.r.t. VSS ................ -0.6V to VCC +1.0V
Storage temperature .....................................-65
°C to +150°C
Ambient temp. with power applied.................-65
°C to +125°C
Soldering temperature of leads (10 seconds) ............. +300
°C
ESD protection on all pins................................................4 kV
*Notice: Stresses above those listed under “Maximum ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specication is
not implied. Exposure to maximum rating conditions for extended peri-
ods may affect device reliability.
TABLE 1-1:
PIN FUNCTION TABLE
Name
Function
CS
Chip Select
CLK
Serial Data Clock
DI
Serial Data Input
DO
Serial Data Output
VSS
Ground
NC
No Connect
VCC
Power Supply
TABLE 1-2:
DC AND AC ELECTRICAL CHARACTERISTICS
All parameters apply over the
specied operating ranges
unless otherwise noted
Automotive (E):VCC = +4.5V to +5.5VTamb = -40
°C to +125°C
Parameter
Symbol
Min.
Max.
Units
Conditions
High level input voltage
VIH
2.0
VCC +1
V
Low level input voltage
VIL
-0.3
0.8
V
Low level output voltage
VOL
—
0.4
V
IOL = 2.1 mA; VCC = 4.5V
High level output voltage
VOH
2.4
—
V
IOH = -400
A; VCC = 4.5V
Input leakage current
ILI
-10
10
AVIN = VSS to VCC
Output leakage current
ILO
-10
10
AVOUT = VSS to VCC
Pin capacitance
(all inputs/outputs)
CIN, COUT
—7
pF
VIN/VOUT = 0 V (Notes 1 & 2)
Tamb = +25
°C, FCLK = 1 MHz
Operating current
ICC write
—
1.5
mA
ICC read
—
1
mA
Standby current
ICCS
—1
A
CS = VSS; DI = VSS
Clock frequency
FCLK
—
2
MHz
Clock high time
TCKH
250
—
ns
Clock low time
TCKL
250
—
ns
Chip select setup time
TCSS
50
—
ns
Relative to CLK
Chip select hold time
TCSH
0
—
ns
Relative to CLK
Chip select low time
TCSL
250
—
ns
Data input setup time
TDIS
100
—
ns
Relative to CLK
Data input hold time
TDIH
100
—
ns
Relative to CLK
Data output delay time
TPD
—
400
ns
CL = 100 pF
Data output disable time
TCZ
—
100
ns
CL = 100 pF (Note 2)
Status valid time
TSV
—
500
ns
CL = 100 pF
Program cycle time
TWC
—
2
ms
ERASE/WRITE mode
TEC
—
6
ms
ERAL mode
TWL
—
15
ms
WRAL mode
Endurance
—
1M
—
cycles
25
Note 1: This parameter is tested at Tamb = 25
°C and FCLK = 1 MHz.
2: This parameter is periodically sampled and not 100% tested.
3: This application is not tested but guaranteed by characterization. For endurance estimates in a specic
application, please consult the Total Endurance Model which may be obtained on our website.
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