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參數(shù)資料
| 型號： | 93AA56AP |
| 廠商： | Microchip Technology Inc. |
| 元件分類： | EEPROM |
| 英文描述： | 2K Microwire Compatible Serial EEPROM |
| 中文描述： | 2K微絲兼容串行EEPROM |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 405K |
| 代理商： | 93AA56AP |
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
DS21794B-page 8
2003 Microchip Technology Inc.
2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX56A/B/C powers up in the ERASE/WRITE
Disable (
EWDS
) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (
EWEN
) instruc-
tion. Once the
EWEN
instruction is executed, program-
ming remains enabled until an
EWDS
instruction is
executed or Vcc is removed from the device.
To protect against accidental data disturbance, the
EWDS
instruction can be used to disable all ERASE/
WRITE functions and should follow all programming
operations. Execution of a
READ
instruction is indepen-
dent of both the
EWEN
and
EWDS
instructions.
FIGURE 2-5:
EWDS TIMING
FIGURE 2-6:
EWEN TIMING
2.7
READ
The
READ
instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (T
PD
). Sequential read is possible when
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
FIGURE 2-7:
READ TIMING
CS
CLK
DI
1
0
0
0
0
X
X
T
CSL
1
X
CS
CLK
DI
0
0
1
1
X
T
CSL
CS
CLK
DI
DO
1
1
0
An
A0
HIGH-Z
0
Dx
D0
Dx
D0
Dx
D0
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| 93AA56ASN | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:2K Microwire Compatible Serial EEPROM |
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| 93AA56ATE/MS | 制造商:MICROCHIP 制造商全稱:Microchip Technology 功能描述:2K Microwire Compatible Serial EEPROM |
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