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參數(shù)資料
| 型號： | 935271414518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | 3.90 MM, PLASTIC, MS-012, SO-8 |
| 文件頁數(shù)： | 9/12頁 |
| 文件大?。?/td> | 116K |
| 代理商： | 935271414518 |
Philips Semiconductors
Product data
MAX708R/S/T
3 V microprocessor supervisor circuit with
power fail comparator and manual reset
2002 Feb 13
6
TECHNICAL DISCUSSION
General discussion
The MAX708R/S/T microprocessor supervisor circuits are
comprised of both RESET and RESET outputs, a MR manual reset
input, and a comparator which may be used for power-failure
detection (see Figure 4).
The reset threshold voltages are guaranteed within
±3% of the
nominal reset threshold. The MAX708R/S/T are designed to monitor
+3 V to +3.3 V power supplies in +3 V to +5 V microprocessor and
other logic systems. With a threshold voltage range between 5% to
10% of the nominal supply voltage, the MAX708R/S/T will assert an
output within predictable range of power supply voltage.
8
+1.25 V
POWER-FAIL
COMPARATOR
VRST
RESET
GENERATOR
VCC
7
5
6
1
2
4
3
RESET
NC
PFO
MR
VCC
GND
PFI
SL01813
MAX708R/S/T
Figure 4. MAX708R/S/T internal block diagram.
RESET and RESET outputs
The MAX708R/S/T RESET and RESET outputs are push-pull
outputs and do not require an external pull-up resistor. The RESET
output is active-LOW logic, while the RESET output is active-HIGH
logic.
Manual Reset
The manual reset input, MR is active-LOW logic. It allows the
RESET and RESET to be asserted by a pushbutton switch. A
mechanical pushbutton switch is effectively debounced by the
140 ms minimum reset time delay. MR may be driven from an
external logic circuit because it is TTL/CMOS compatible. The
minimum MR input pulse is 500 ns for VCC = +3 V and 150 ns for
VCC = +5 V. If manual reset will not be used, leave the pin left
floating or tie it to VCC.
Power-fail comparator
The power-fail comparator has many useful purposes, such as
monitoring upstream or secondary power supplies. The Power-Fail
Output (PFO) and the non-inverting Power-Fail Input (PFI) are
pinned out. The inverting input of the power-fail comparator is
internally connected to a 1.25 V reference. The comparator has
10 mV of hysteresis which prevents repeated triggering of the
output (PFO).
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