參數(shù)資料
型號(hào)： 935269823118
廠商： NXP SEMICONDUCTORS
元件分類： Buffer和線驅(qū)動(dòng)
英文描述： LINE TRANSCEIVER, PBCC16
封裝： 3 X 3 X 0.65 MM, PLASTIC, MO-217, SOT-639-2, HBCC-16
文件頁(yè)數(shù)： 23/25頁(yè)
文件大?。?/td> 594K
代理商： 935269823118
Philips Semiconductors
ISP1105/1106/1107
Advanced USB transceivers
Product data
Rev. 07 — 29 March 2002
7 of 25
9397 750 09529
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
7.2 Operating functions
[1]
VP = VM = H indicates the sharing mode (VCC(5.0)/Vreg(3.3) is disconnected).
[2]
RCV* denotes the signal level on output RCV just before SE0 state occurs. This level is stable during
the SE0 period.
7.3 Power supply congurations
The ISP1105/1106/1107 can be used with different power supply congurations,
which can be changed dynamically. An overview is given in Table 9.
Normal mode — Both VCC(I/O) and VCC(5.0) or (VCC(5.0) and Vreg(3.3)) are connected.
For 5 V operation, VCC(5.0) is connected to a 5 V source (4.0 to 5.5 V). The internal
voltage regulator then produces 3.3 V for the USB connections. For 3.3 V operation,
both VCC(5.0) and Vreg(3.3) are connected to a 3.3 V source (3.0 to 3.6 V). VCC(I/O) is
independently connected to a voltage source (1.65 V to 3.6 V), depending on the
supply voltage of the external circuit.
Disable mode — VCC(I/O) is not connected, VCC(5.0) or (VCC(5.0) and Vreg(3.3)) are
connected. In this mode, the internal circuits of the ISP1105/1106/1107 ensure that
the (D
+, D) pins are in three-state and the power consumption drops to the
low-power (suspended) state level. Some hysteresis is built into the detection of
VCC(I/O) lost.
Sharing mode — VCC(I/O) is connected, (VCC(5.0) and Vreg(3.3)) are not connected. In
this mode, the (D
+,D) pins are made three-state and the ISP1105/1106/1107 allows
external signals of up to 3.6 V to share the (D
+, D) lines. The internal circuits of the
ISP1105/1106/1107 ensure that virtually no current (maximum 10
A) is drawn via
the (D
+, D) lines. The power consumption through pin V
CC(I/O) drops to the
Table 5:
Driving function using single-ended input data interface (OE = L) [for
ISP1107 and ISP1105 (MODE = L)]
FSE0
VO
Data
L
differential logic 0
L
H
differential logic 1
H
L
SE0
H
SE0
Table 6:
Driving function using differential input data interface (OE = L) [for ISP1106
and ISP1105 (MODE = H)]
VMO
VPO
Data
L
SE0
L
H
differential logic 1
H
L
differential logic 0
H
illegal state
Table 7:
Receiving function (OE=H)
(D
+, D)
RCV
VP[1]
VM[1]
differential logic 0
L
H
differential logic 1
H
L
SE0
LL
相關(guān)PDF資料
PDF描述
0803-6204-02 Quad ISDN U Interface Hybrid
935269132112 PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
935270667118 PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
935269132118 PLL BASED CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO48
935269202112 8 I/O, PIA-GENERAL PURPOSE, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
935269987557 制造商:NXP Semiconductors 功能描述:SUB ONLY TDA9587-1US1-V1.8 SUBBED TO 935269987557
935270713557 制造商:NXP Semiconductors 功能描述:SUB ONLY IC CHP
935270792551 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270792557 制造商:NXP Semiconductors 功能描述:IC BUFF DVR TRI-ST 16BIT 56VFBGA
935270793551 制造商:NXP Semiconductors 功能描述:IC BUS TRCVR 3-ST 16BIT 56VFBGA
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*