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參數(shù)資料
| 型號： | 935269195118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8 I/O, PIA-GENERAL PURPOSE, PDSO16 |
| 封裝： | 7.50 MM, PLASTIC, MS-013, SOT-162-1, SO-16 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大小： | 140K |
| 代理商： | 935269195118 |
Philips Semiconductors
Product data
PCA9554/PCA9554A
8-bit I2C and SMBus I/O port with interrupt
2002 Jul 26
10
SDA
SCL
SU01469
tHD;STA
tF
S
tLOW
tR
tHD;DAT
tSU;DAT
tHIGH
tF
tSU;STA
SR
tHD;STA
tSP
tSU;STD
P
tR
tBUF
S
Figure 11. Definition of timing
AC SPECIFICATIONS
SYMBOL
PARAMETER
STANDARD MODE
I2C BUS
FAST MODE
I2C BUS
UNITS
MIN
MAX
MIN
MAX
fSCL
Operating frequency
0
100
0
400
kHz
tBUF
Bus free time between STOP and START conditions
4.7
—
1.3
—
s
tHD;STA
Hold time after (repeated) START condition
4.0
—
0.6
—
s
tSU;STA
Repeated START condition setup time
4.7
—
0.6
—
s
tSU;STO
Setup time for STOP condition
4.0
—
0.6
—
s
tHD;DAT
Data in hold time
0
—
0
—
ns
tVD;ACK
Valid time for ACK condition2
0.3
3.45
0.1
0.9
s
tVD;DAT
Data out valid time3
300
—
50
—
ns
tSU;DAT
Data setup time
250
—
100
—
ns
tLOW
Clock LOW period
4.7
—
1.3
—
s
tHIGH
Clock HIGH period
4.0
—
0.6
—
s
tF
Clock/Data fall time
—
300
20 + 0.1 Cb1
300
ns
tR
Clock/Data rise time
—
1000
20 + 0.1 Cb1
300
ns
tSP
Pulse width of spikes that must be suppressed by the
input filters
—
50
—
50
ns
Port Timing
tPV
Output data valid
—
200
—
200
ns
tPS
Input data setup time
100
—
100
—
ns
tPH
Input data hold time
1
—
1
—
s
Interrupt Timing
tIV
Interrupt valid
—
4
—
4
s
tIR
Interrupt reset
—
4
—
4
s
NOTES:
1. Cb = total capacitance of one bus line in pF.
2. tVD;ACK = time for Acknowledgement signal from SCL low to SDA (out) low.
3. tVD;DAT = minimum time for SDA data out to be valid following SCL low.
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