參數(shù)資料
型號: 935268832557
廠商: NXP SEMICONDUCTORS
元件分類: 顏色信號轉換
英文描述: COLOR SIGNAL DECODER, PQFP160
封裝: 28 X 28 MM, 3.40 MM HEIGHT, LEAD FREE, PLASTIC, MS-022, SOT322-2 , QFP-160
文件頁數(shù): 50/178頁
文件大?。?/td> 988K
代理商: 935268832557
2004 Jul 22
143
Philips Semiconductors
Product specication
Multistandard video decoder with adaptive
comb lter and component video input
SAA7118
Table 97 I port signal definitions; global set 84H[7:6] and 86H[5]
Table 98 I port signal definitions; global set 84H[5:4] and 86H[4]
Table 99 I port output signal denitions; global set 84H[3:0]; note 1
Note
1. X = don’t care.
I PORT SIGNAL DEFINITIONS
CONTROL BITS
86H[5]
84H[7:6]
IDG02
IDG01
IDG00
IGP0 is output eld ID, as dened by OFIDC[90H[6]]
0
IGP0 is A/B task ag, as dened by CONLH[90H[7]]
0
1
IGP0 is sliced data ag, framing the sliced VBI data at the I port
0
1
0
IGP0 is set to logic 0 (default polarity)
011
IGP0 is the output FIFO almost lled ag
100
IGP0 is the output FIFO overow ag
101
IGP0 is the output FIFO almost full ag, level to be programmed in subaddress 86H
1
0
IGP0 is the output FIFO almost empty ag, level to be programmed in subaddress 86H
1
I PORT SIGNAL DEFINITIONS
CONTROL BITS
86H[4]
84H[5:4]
IDG12
IDG11
IDG10
IGP1 is output eld ID, as dened by OFIDC[90H[6]]
0
IGP1 is A/B task ag, as dened by CONLH[90H[7]]
0
1
IGP1 is sliced data ag, framing the sliced VBI data at the I port
0
1
0
IGP1 is set to logic 0 (default polarity)
011
IGP1 is the output FIFO almost lled ag
100
IGP1 is the output FIFO overow ag
101
IGP1 is the output FIFO almost full ag, level to be programmed in subaddress 86H
1
0
IGP1 is the output FIFO almost empty ag, level to be programmed in subaddress 86H
1
I PORT OUTPUT SIGNAL DEFINITIONS
CONTROL BITS D3 TO D0
IDV1
IDV0
IDH1
IDH0
IGPH is a H gate signal, framing the scaler output
X
0
IGPH is an extended H gate (framing H gate during scaler output and scaler input
H reference outside the scaler window)
XX
0
1
IGPH is a horizontal trigger pulse, on active going edge of H gate
X
1
0
IGPH is a horizontal trigger pulse, on active going edge of extended H gate
X
1
IGPV is a V gate signal, framing scaled output lines
0
X
IGPV is the V reference signal from scaler input
0
1
X
IGPV is a vertical trigger pulse, derived from V gate
1
0
X
IGPV is a vertical trigger pulse derived from input V reference
1
X
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