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參數(shù)資料
| 型號(hào)： | 935267994118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | AHC SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 |
| 封裝： | 7.50 MM, PLASTIC, MS-013AC, SOT-163-1, SO-20 |
| 文件頁(yè)數(shù)： | 2/20頁(yè) |
| 文件大?。?/td> | 93K |
| 代理商： | 935267994118 |
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2000 Aug 15
10
Philips Semiconductors
Product specication
Octal D-type ip-op with data enable;
positive-edge trigger
74AHC377; 74AHCT377
Type 74AHCT377
GND = 0 V; tr =tf ≤ 3.0 ns.
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb (°C)
UNIT
WAVEFORMS
CL
25
40 to +85
40 to +125
MIN.
TYP.
MAX.
MIN.
MAX.
MIN.
MAX.
VCC = 4.5 to 5.5 V; typical values at VCC = 5.0 V
tPHL/tPLH
propagation delay
CP to Qn
see Figs 6 and 8
15 pF
4.0
9.0
1.0
10.5
1.0
11.5
ns
fmax
maximum clock
pulse frequency
see Figs 6 and 8
90
140
80
80
MHz
tPHL/tPLH
propagation delay
CP to Qn
see Figs 6 and 8
50 pF
5.7
10.5
1.0
12.0
1.0
13.5
ns
tW
clock pulse width
HIGH or LOW
see Figs 6 and 8
5.0
5.0
5.0
ns
tsu
set-up time
Dn to CP
see Figs 7 and 8
4.5
4.5
4.5
ns
set-up time
EtoCP
4.5
4.5
4.5
ns
th
hold time
Dn to CP
2.0
2.0
2.0
ns
hold time
EtoCP
2.0
2.0
2.0
ns
fmax
maximum clock
pulse frequency
see Figs 6 and 8
85
130
75
75
MHz
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