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參數(shù)資料
| 型號： | 935267812557 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, FLASH, 33 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, QFP-44 |
| 文件頁數(shù)： | 35/52頁 |
| 文件大小： | 288K |
| 代理商： | 935267812557 |
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Philips Semiconductors
Preliminary data
P89C51RB2/P89C51RC2/
P89C51RD2
80C51 8-bit Flash microcontroller family
16KB/32KB/64KB ISP/IAP Flash with 512B/512B/1KB RAM
2001 Jun 27
40
FLASH EPROM MEMORY
GENERAL DESCRIPTION
The P89C51RB2/RC2/RD2 Flash memory augments EPROM
functionality with in-circuit electrical erasure and programming. The
Flash can be read and written as bytes. The Chip Erase operation will
erase the entire program memory. The Block Erase function can
erase any Flash block. In-system programming and standard parallel
programming are both available. On-chip erase and write timing
generation contribute to a user friendly programming interface.
The P89C51RB2/RC2/RD2 Flash reliably stores memory contents
even after 10,000 erase and program cycles. The cell is designed to
optimize the erase and programming mechanisms. In addition, the
combination of advanced tunnel oxide processing and low internal
electric fields for erase and programming operations produces
reliable cycling. The P89C51RB2/RC2/RD2 uses a +5 V VPP supply
to perform the Program/Erase algorithms.
FEATURES – IN-SYSTEM PROGRAMMING (ISP)
AND IN-APPLICATION PROGRAMMING (IAP)
Flash EPROM internal program memory with Block Erase.
Internal 1 kbyte fixed boot ROM, containing low-level in-system
programming routines and a default serial loader. User program
can call these routines to perform In-Application Programming
(IAP). The Boot ROM can be turned off to provide access to the
full 64 kbyte Flash memory.
Boot vector allows user provided Flash loader code to reside
anywhere in the Flash memory space. This configuration provides
flexibility to the user.
Default loader in Boot ROM allows programming via the serial port
without the need for a user provided loader.
Up to 64 kbytes external program memory if the internal program
memory is disabled (EA = 0).
Programming and erase voltage +5 V (+12 V tolerant).
Read/Programming/Erase using ISP/IAP:
– Byte Programming (20
ms).
– Typical quick erase times:
Block Erase (8 kbytes or 16 kbytes) in 10 seconds.
Full Erase (64 kbytes) in 20 seconds.
Parallel programming with 87C51 compatible hardware interface
to programmer.
In-system programming.
Programmable security for the code in the Flash.
10,000 minimum erase/program cycles for each byte.
10-year minimum data retention.
CAPABILITIES OF THE PHILIPS 89C51
FLASH-BASED MICROCONTROLLERS
Flash organization
The P89C51RB2/RC2/RD2 contains 16KB/32KB/64KB of Flash
program memory. This memory is organized as 5 separate blocks.
The first two blocks are 8 kbytes in size, filling the program memory
space from address 0 through 3FFF hex. The final three blocks are
16 kbytes in size and occupy addresses from 4000 through FFFF
hex.
Figure 43 depicts the Flash memory configurations.
Flash Programming and Erasure
There are three methods of erasing or programming of the Flash
memory that may be used. First, the Flash may be programmed or
erased in the end-user application by calling low-level routines
through a common entry point in the Boot ROM. The end-user
application, though, must be executing code from a different block
than the block that is being erased or programmed. Second, the
on-chip ISP boot loader may be invoked. This ISP boot loader will, in
turn, call low-level routines through the same common entry point in
the Boot ROM that can be used by the end-user application. Third,
the Flash may be programmed or erased using the parallel method
by using a commercially available EPROM programmer. The parallel
programming method used by these devices is similar to that used
by EPROM 87C51, but it is not identical, and the commercially
available programmer will need to have support for these devices.
Boot ROM
When the microcontroller programs its own Flash memory, all of the
low level details are handled by code that is permanently contained
in a 1 kbyte Boot ROM that is separate from the Flash memory.
A user program simply calls the common entry point with appropriate
parameters in the Boot ROM to accomplish the desired operation.
Boot ROM operations include things like: erase block, program byte,
verify byte, program security lock bit, etc. The Boot ROM overlays
the program memory space at the top of the address space from
FC00 to FFFF hex, when it is enabled. The Boot ROM may be
turned off so that the upper 1 kbyte of Flash program memory are
accessible for execution.
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| 08-50-0031 | 2.5mm KK Crp Term Chn il W/Ct Ear |
| 08-50-0032 | CRIMP PIN, 22-30AWG, PK1000; Series:KK; Connector type:Contact, Crimp; Gender:Socket; Termination method:Crimp; Material, contact:Brass; Plating, contact:Tin; Wire size, AWG:22AWG; Approval Bodies:UL, CSA; Area, wire size RoHS Compliant: Yes |
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