
Philips Semiconductors
DSPCPU Operations for TM1300
PRODUCT SPECIFICATION
A-153
Read data cache address tag
SYNTAX
[ IF r
guard ] rdtag(d) rsrc1
→ rdest
FUNCTION
if r
guard then {
block_addr
← rsrc1 + d
/* block_addr<13:11> selects element, block_addr<10:6> selects set */
r
dest<21:0>
← dcache_tag_block(block_addr)
r
dest<31:22>
← 0
}
ATTRIBUTES
Function unit
dmemspec
Operation code
202
Number of operands
1
Modier
7 bits
Modier range
–256..252 by 4
Latency
3
Issue slots
5
DESCRIPTION
The rdtag operation reads the address tag associated with a block in the data cache and writes these bits into the
destination register r
dest. The target block in the data cache is determined by bits 13..6 of the result of rsrc1 + d. Bits
10..6 of r
src1 + d select the cache set and 13..11 of rsrc1 + d select the element within that set. The d value is an
opcode modier, must be in the range –256 to 252 inclusive, and must be a multiple of 4.
rdtag
writes the address tag for the selected block in bits 21..0 of r
dest. All other bits of rdest are set to zero.
rdtag
requires no stall cycles to complete.
The dual-ported data cache uses two separate copies of tag and status information. A rdtag operation returns the
address tag information stored in the cache port that corresponds to the operation slot in which the rdtag operation
is issued.
The rdtag operation optionally takes a guard, specied in r
guard. If a guard is present, its LSB controls the
modication of the destination register. If the LSB of r
guard is 1, rdest is written; otherwise, rdest is not changed.
EXAMPLES
Initial Values
Operation
Result
rdtag(0) r30
→ r60
r10 = 0
IF r10 rdtag(4) r40
→ r70
no change, since guard is false
r20 = 1
IF r20 rdtag(8) r50
→ r80
SEE ALSO
rdstatus
rdtag