
AB
C
H
E
D
F
G
I
J
K
LM N
O
P
Q
RS
T
U
V W X
Y
Z
Index-2
PRODUCT SPECIFICATION
asi A-7
asli A-8
asr A-9
asri A-10
audio capture 8-4
audio codec 8-1, 8-2
audio in unit
diagnostic mode 8-7
memory data formats 8-4
audio input 8-1
audio memory format 8-4
audio out unit
memory data formats 9-6
Audio Output 1-1
audio sample rate 8-2
audio test 8-7
B
bandwidth
requirements of ICP 14-1
base address
PCI interface registers 11-7
BDATAAHIGH
picture 3-14
BDATAALOW
picture 3-14
BDATAMASK
picture 3-14
BDATAVAL
picture 3-14
BDCTL
picture 3-14
BICTL
picture 3-13
binary compatibility 3-4
BINSTHIGH
picture 3-14
BINSTLOW
picture 3-14
bit masking 14-28
bitand A-11
bitandinv A-12
bitinv A-13
bitmap
masking 14-1
bitor A-14
bitxor A-15
BIU_CTL
PCI interface MMIO register 11-11
picture 11-10
BIU_STATUS
PCI interface MMIO register 11-10
picture 11-10
blending
alpha 14-1
blending codes
alpha blending 14-5
block timing
PCI output 14-16
board design 1-1
boolean representation 3-3
borrow A-16
boundary scan 1-1
breakpoints 3-13
built-in self test
PCI interface register 11-7
byte ordering
DSPCPU 3-2
bytesex 3-2
C
cache
address mapping,instruction cache 5-8
alignment 5-3, 5-4
associativity 5-3
bandwidth requirements 5-1
block size 5-3
blocksize 5-3
byte in word 5-3
coherency 5-3, 5-4, 5-11
copyback 5-4
copyback operation 5-6
CPU stall 5-8
data cache characteristics,table 5-3
data cache initialization 5-8
data cache,description 5-3
dcb opcode 5-6
dinvalid opcode 5-6
dirty bit 5-4
dirty bits 5-3
dual port 5-4
endian-ness 5-3, 5-4
hidden concurrency 5-7
iclr operation 5-9
initialization 5-8
instruction cache 5-8
instruction cache coherency 5-9
instruction cache initialization and boot 5-10
instruction cache parameters 5-8
instruction cache summary 5-8
instruction cache tag 5-8
invalidate operation 5-6
latency 5-8
locking 5-3, 5-4