參數(shù)資料
型號: 935265484112
廠商: NXP SEMICONDUCTORS
元件分類: 總線收發(fā)器
英文描述: AVC SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48
封裝: 6.10 MM, PLASTIC, MO-153, SOT-362, TSSOP-48
文件頁數(shù): 16/16頁
文件大小: 84K
代理商: 935265484112
2000 Mar 09
9
Philips Semiconductors
Product Specication
16-bit edge triggered D-type ip-op; 3.6 V tolerant;
3-state
74AVC16374
AC CHARACTERISTICS
GND = 0 V; tr =tf ≤ 2.0 ns.
Note
1. All typical values are measured at Tamb =25 °C and at VCC respectively 1.2, 1.5, 1.8, 2.5 and 3.3 V.
SYMBOL
PARAMETER
TEST CONDITIONS
Tamb = 40 to +85 °C
UNIT
WAVEFORMS
VCC (V)
MIN.
TYP.(1)
MAX.
tPHL/tPLH
propagation delay
nCP to nQn
see Figs 7 and 10
1.2
3.1
ns
1.40 to 1.60
1.2
2.4
8.4
ns
1.65 to 1.95
1.0
2.0
6.7
ns
2.3 to 2.7
0.8
1.5
4.1
ns
3.0 to 3.6
0.7
1.3
3.3
ns
tPZH/tPZL
3-state output enable time
nOE to nQn
see Figs 8 and 10
1.2
5.4
ns
1.40 to 1.60
1.6
3.9
8.5
ns
1.65 to 1.95
2.3
3.3
6.7
ns
2.3 to 2.7
0.9
2.3
4.3
ns
3.0 to 3.6
0.7
2.0
3.4
ns
tPHZ/tPLZ
3-state output disable time
nOE to nQn
see Figs 8 and 10
1.2
5.6
ns
1.40 to 1.60
2.5
4.5
9.4
ns
1.65 to 1.95
1.8
3.3
7.8
ns
2.3 to 2.7
1.0
1.8
4.2
ns
3.0 to 3.6
1.2
2.0
3.9
ns
tW
nCP pulse width HIGH
see Figs 7 and 10
1.2
0.8
ns
1.40 to 1.60
0.5
ns
1.65 to 1.95
3.1
0.3
ns
2.3 to 2.7
2.5
0.2
ns
3.0 to 3.6
2.5
0.2
ns
tsu
set-up time nDn to nCP
see Figs 9 and 10
1.2
0.6
ns
1.40 to 1.60
2.7
0.3
ns
1.65 to 1.95
1.9
0.3
ns
2.3 to 2.7
1.4
0.2
ns
3.0 to 3.6
1.4
0.1
ns
th
hold time nDn to nCP
see Figs 9 and 10
1.2
0.8
ns
1.40 to 1.60
1.3
0.7
ns
1.65 to 1.95
1.2
0.6
ns
2.3 to 2.7
1.1
0.5
ns
3.0 to 3.6
1.1
0.4
ns
fmax
maximum clock pulse
frequency
see Figs 7 and 10
1.2
250
MHz
1.40 to 1.60
300
MHz
1.65 to 1.95
160
320
MHz
2.3 to 2.7
200
350
MHz
3.0 to 3.6
200
350
MHz
相關(guān)PDF資料
PDF描述
935265484118 AVC SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48
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