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參數(shù)資料
| 型號： | 935265306112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | MULTIPLEXER, PDSO20 |
| 封裝： | TSSOP-20 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 135K |
| 代理商： | 935265306112 |
Philips Semiconductors
Product specification
PCA9559
5-bit multiplexed/1-bit latched 6-bit I2C EEPROM
2
2000 Jan 31
853-2181 23063
FEATURES
5-bit 2-to-1 multiplexer, 1-bit latch
6-bit internal non-volatile register
Internal non-volatile register programmable and readable via I2C bus
Override input forces all outputs to logic 0
5 open drain multiplexed outputs
1 open drain non-multiplexed (latched) output
5V and 2.5V tolerant inputs
Useful for ‘jumperless’ configuration of PC motherboards
2 address pins, allowing up to 4 devices on the I2C bus
DESCRIPTION
The primary function of the 5-bit multiplexer, 1-bit latch is to enable
system configuration.
PIN CONFIGURATION
I
2C SCL
I2C SDA
MUX_IN B
VCC
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
MUX_IN C
MUX_IN D
MUX_IN E
MUX_OUT B
MUX_OUT C
MUX_OUT D
MUX_OUT E
SW00216
GND
9
10
A1
A0
12
11
NON_MUXED_OUT
MUX_OUT A
MUX_IN A
WP
OVERRIDE #
MUX_SELECT
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
ORDER CODE
DRAWING NUMBER
20-Pin Plastic TSSOP
0
°C to +70°C
PCA9559 PW DH
SOT360-1
FUNCTIONAL DESCRIPTION
When the MUX_SELECT signal is logic 0, the multiplexer will select
the data from the non-volatile register to drive on the MUX_OUT
pins. When the MUX_SELECT signal is logic 1, the multiplexer will
select the MUX_IN lines to drive on the MUX_OUT pins. The
MUX_SELECT signal is also used to latch the NON_MUXED_OUT
signal which outputs data from the non-volatile register. The
NON_MUXED_OUT signal latch is transparent when MUX_SELECT
is in a logic 0 state, and will latch data when MUX_SELECT is in a
logic 1 state. When the active-LOW OVERRIDE# signal is set to
logic 0 and the MUX_SELECT signal is at a logic 0, all outputs will
be driven to logic 0. This information is summarized in Table 1.
The Write Protect (WP) input is used to control the ability to write the
contents of the 6-bit non-volatile register. If the WP signal is logic 0,
the I2C bus will be able to write the contents of the non-volatile
register. If the WP signal is logic 1, data will not be allowed to be
written into the non-volatile register.
The factory default for the contents of the non-volatile register are all
logic 0. These stored values can be read or written using the I2C
bus (described in the next section).
The OVERRIDE#, WP, MUX_IN, and MUX_SELECT signals have
internal pullup resistors. See the DC and AC Characteristics for
hysteresis and signal spike suppression figures.
FUNCTION TABLE
OVERRIDE#
MUX_SELECT
MUX_OUT
OUTPUTS
NON_MUXED_OUT
OUTPUT
0
All 0’s
0
1
MUX_IN
inputs
Latched
NON_MUXED_OUT 1
1
0
From non-
volatile
register
From non-volatile
register
1
MUX_IN
inputs
From non-volatile
register
NOTE:
1. NON_MUXED_OUT state will be the value present on the output
at the time of the MUX_SELECT input transitioned from a logic 0
to a logic 1 state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 08-50-0005 | SOLDERLESS TERMINAL POWER CONNECTION TYPE:CRIMP CONTACT |
| 08-50-0004 | Crimp Socket Contact; Wire Size (AWG):30-22; Contact Plating:Tin Over Copper; Leaded Process Compatible:No; Peak Reflow Compatible (260 C):No; Series:7879; External Depth:0.062"; Lead Pitch:2.54mm; Voltage Rating:250V |
| 08-55-0124 | Crimp Socket Contact; Wire Size (AWG):30-22; Contact Material:Brass RoHS Compliant: Yes |
| 08-55-0129 | Solderless Terminal; RoHS Compliant:Yes RoHS Compliant: Yes |
| 08-55-0128 | BRASS, TIN (100) FINISH, WIRE TERMINAL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| 935267356112 | 制造商:NXP Semiconductors 功能描述:IC TEA1507PN |
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