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參數(shù)資料
| 型號(hào)： | 935264443112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | AVC SERIES, 16 1-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | 6.10 MM, PLASTIC, MO-153, SOT-362-1, TSSOP-48 |
| 文件頁數(shù)： | 9/16頁 |
| 文件大?。?/td> | 80K |
| 代理商： | 935264443112 |
2000 Mar 07
2
Philips Semiconductors
Product Specication
16-bit buffer/line driver; 3.6 V tolerant;
3-state
74AVCH16244
FEATURES
Wide supply voltage range from 1.2 to 3.6 V
Complies with JEDEC standard no. 8-1A/5/7
CMOS low power consumption
Input/output tolerant up to 3.6 V
Dynamic Controlled Output (DCO) circuit dynamically
changes the output impedance, resulting in noise
reduction without speed degradation
Low inductance multiple VCC and GND pins to minimize
noise and ground bounce
Supports Live Insertion
All data inputs have bus-hold.
DESCRIPTION
The 74AVCH16244 is a 16-bit non-inverting buffer/line
driver with 3-state outputs. The device can be used as four
4-bit buffers, two 8-bit buffers or one 16-bit buffer.
The 3-state outputs are controlled by the output enable
inputs nOE. A HIGH on nOE causes the outputs to assume
a high impedance OFF-state.
The 74AVCH16244 is designed to have an extremely fast
propagation delay and a minimum amount of power
consumption.
To ensure the high-impedance output state during
power-up or power-down, nOE should be tied to VCC
through a pull-up resistor (Live Insertion).
A Dynamic Controlled Output (DCO) circuitry is
implemented to support termination line drive during
transient (see Figs 1 and 2).
The 74AVCH16244 has active bus-hold circuitry to hold
unused or floating data inputs at a valid logic level. This
feature eliminates the need for external pull-up or
pull-down resistors.
handbook, halfpage
012
4
0
200
300
100
MNA506
3
VOH (V)
IOH
(mA)
1.8 V
2.5 V
3.3 V
Fig.1
Output voltage as a function of the
HIGH-level output current.
Fig.2
Output voltage as a function of the
LOW-level output current.
handbook, halfpage
012
4
300
100
0
200
MNA507
3
VOL (V)
IOL
(mA)
1.8 V
2.5 V
3.3 V
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