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參數(shù)資料
| 型號： | 935264009112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | 18 1-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| 封裝： | PLASTIC, TSSOP-56 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大小： | 95K |
| 代理商： | 935264009112 |
Philips Semiconductors
Product specification
GTL16612
18-bit GTL/GTL+ to LVTTL/TTL bidirectional
universal translator (3-State)
2000 Jun 19
3
PIN CONFIGURATION
GND
CEAB
GND
LEAB
OEAB
GND
VCC
NC
GND
VCC
VREF
GND
CEBA
GND
LEBA
OEBA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
CPAB
B0
B2
B1
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
CPBA
SW00485
A0
PIN DESCRIPTION
PIN NUMBER
SYMBOL
NAME AND FUNCTION
1, 27
OEAB/OEBA
A-to-B/ B-to-A Output enable
input (active Low)
29, 56
CEBA/CEAB
B-to-A/A-to-B clock enable
2, 28
LEAB/LEBA
A-to-B/B-to-A Latch enable input
55,30
CPAB/CPBA
A-to-B/B-to-A Clock input
(active rising edge)
3, 5, 6, 8, 9, 10,
12, 13, 14, 15,
16, 17, 19, 20,
21, 23, 24, 26
A0-A17
Data inputs/outputs (A side)
54, 52, 51, 49,
48, 47, 45, 44,
43, 42, 41, 40,
38, 37, 36, 34,
33, 31
B0-B17
Data inputs/outputs (B side)
4, 11, 18, 25,
32, 39, 46, 53
GND
Ground (0 V)
7, 22
VCC
Positive supply voltage
35
VREF
GTL reference voltage
50
NC
No connection
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