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參數(shù)資料
| 型號： | 935263999112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | AHC SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16 |
| 封裝： | 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16 |
| 文件頁數(shù)： | 10/16頁 |
| 文件大?。?/td> | 84K |
| 代理商： | 935263999112 |
1999 Sep 24
3
Philips Semiconductors
Product specication
Quad 2-input multiplexer
74AHC157;
74AHCT157
QUICK REFERENCE DATA
GND = 0 V; Tamb =25 °C; tr =tf ≤ 3.0 ns.
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W).
PD =CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
∑ (CL × VCC2 × fo) = sum of outputs;
CL = output load capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
PINNING
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
AHC
AHCT
tPHL/tPLH
propagation delay
nI0,nI1 to nY
CL = 15 pF; VCC = 5 V
3.2
3.4
ns
StonY
CL = 15 pF; VCC = 5 V
4.5
5.1
ns
EtonY
CL = 15 pF; VCC = 5 V
3.7
4.0
ns
CI
input capacitance
VI =VCC or GND
3.0
pF
CO
output capacitance
4.0
pF
CPD
power dissipation
capacitance
CL = 50 pF; f = 1 MHz; notes 1 and 2
4 outputs switching via S
31
41
pF
1 output switching via I
13
16
pF
PIN
SYMBOL
DESCRIPTION
1
S
common data select input
2, 5, 11 and 14
1I0 to 4I0
data inputs from source 0
3, 6, 10 and 13
1I1 to 4I1
data inputs from source 1
4, 7, 9 and 12
1Y to 4Y
multiplexer outputs
8
GND
ground (0 V)
15
E
enable input (active LOW)
16
VCC
DC supply voltage
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