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參數(shù)資料
| 型號： | 935263881112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PDSO28 |
| 封裝： | PLASTIC, SOT-341, SSOP-28 |
| 文件頁數(shù)： | 8/38頁 |
| 文件大?。?/td> | 287K |
| 代理商： | 935263881112 |
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1999 Feb 17
16
Philips Semiconductors
Product specication
Cordless telephone, answering machine
line interface
UBA1707
General purpose switches (pins SWI1, SWI2 and
SWI3; bits SWC1, SWC2 and SWC3)
The UBA1707 is equipped with 3 general purpose
open-collector switches which short the pins SWI1, SWI2
and SWI3 to ground. They are respectively controlled by
bits SWC1, SWC2 and SWC3 and have an operating
voltage limited to 12 V. The outputs have to be current
biased.
For a bias current between 2 and 20 mA, the AC
impedance is 30
maximum.
Serial interface (pins DATA, CLK and EN)
A simple 3-wire unidirectional serial bus is used to program
the circuit. The 3 wires of the bus are EN, CLK and DATA.
The data sent to the device is loaded in bursts framed by
EN. Programming clock edges (falling edges) and their
appropriate data bits are ignored until EN goes active
HIGH. The programmed information is loaded into the
addressed register when EN returns inactive (LOW) or left
open-circuit.
During normal operation, EN should be kept LOW. Only
the last 8 bits serially clocked into the device are retained
within the programming register. Additional leading bits
are ignored and no check is made on the number of clock
pulses. It can always capture new programming data even
during global power-down (bit PD at logic 1).
Data is entered with the most significant bit first.
The leading 6 bits make up the data field (bits D0 to D5)
while the trailing 2 bits are the address field
(bits ADO and AD1). The first bit entered is D5, the last
bit AD0. This organisation allows to send only the number
of bits of the addressed register.
Figure 16 shows the serial timing diagram. Table 1 gives
the list of registers.
When the supply voltage VCC drops below 2.5 V, all
register files are set in the initial state (see Table 1) defined
by the power-up reset. At start-up, the circuit is in
power-down mode.
In the event that the IC is used in a noisy environment, it is
advised to periodically refresh the content of registers.
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