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參數(shù)資料
| 型號(hào)： | 935263591118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | AHCT/VHCT SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, MO-153AC, SOT-360-1, TSSOP-20 |
| 文件頁數(shù)： | 5/20頁 |
| 文件大?。?/td> | 92K |
| 代理商： | 935263591118 |
1999 Sep 01
13
Philips Semiconductors
Product specication
Octal D-type ip-op with reset;
positive-edge trigger
74AHC273; 74AHCT273
handbook, full pagewidth
MNA202
GND
th
tsu
VM
(1)
VM
(1)
VM
(1)
VI
Qn OUTPUT
CP INPUT
Dn INPUT
Fig.8 The data set-up and hold times for the data input (Dn).
The shaded areas indicate when the input is permitted to change for predicable output performance.
FAMILY
VI INPUT
REQUIREMENTS
VM
INPUT
VM
OUTPUT
AHC
GND to VCC
50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
Fig.9 Load circuitry for switching times.
handbook, full pagewidth
open
GND
VCC
VI
VO
MNA183
D.U.T.
CL
RT
1000
PULSE
GENERATOR
S1
TEST
S1
tPLH/tPHL
open
tPLZ/tPZL
VCC
tPHZ/tPZH
GND
Definitions for test circuit.
CL = load capacitance including jig and probe capacitance (See Chapter “AC characteristics”).
RL = load resistance.
RT = termination resistance should be equal to the output impedance Zo of the pulse generator.
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