參數(shù)資料
型號: 935263566112
廠商: NXP SEMICONDUCTORS
元件分類: 編、解碼器及復(fù)用、解復(fù)用
英文描述: AHC SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, PDSO16
封裝: 4.40 MM, PLASTIC, MO-153, SOT-403-1, TSSOP-16
文件頁數(shù): 2/16頁
文件大小: 582K
代理商: 935263566112
1999 Sep 01
10
Philips Semiconductors
Product specication
Dual 2-to-4 line decoder/demultiplexer
74AHC139;
74AHCT139
AC WAVEFORMS
Fig.5
The address input (nAn) to output (nYn)
propagation delays.
FAMILY
VI INPUT
REQUIREMENTS
VM
INPUT
VM
OUTPUT
AHC
GND to VCC
50% VCC 50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
handbook, halfpage
MNA469
tPHL
VI
GND
VOH
VOL
tPLH
VM
(1)
VM
(1)
nAn INPUT
nYn OUTPUT
Fig.6
The enable input (nE) to output (nYn)
propagation delays.
FAMILY
VI INPUT
REQUIREMENTS
VM
INPUT
VM
OUTPUT
AHC
GND to VCC
50% VCC 50% VCC
AHCT
GND to 3.0 V
1.5 V
50% VCC
handbook, halfpage
MNA470
tPHL
VI
GND
VOH
VOL
tPLH
VM
(1)
VM
(1)
nE INPUT
nYn OUTPUT
Fig.7 Load circuitry for switching times.
handbook, full pagewidth
open
GND
VCC
VI
VO
MNA219
D.U.T.
CL
RT
1000
PULSE
GENERATOR
S1
TEST
S1
tPLH/tPHL
open
tPLZ/tPZL
VCC
tPHZ/tPZH
GND
Definitions for test circuit:
CL = Load capacitance including jig and probe capacitance.
(See Chapter “AC characteristics” for values).
RT = Termination resistance should be equal to the output
impedance Zo of the pulse generator.
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