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參數(shù)資料
| 型號(hào)： | 935263513551 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | SPECIALTY MICROPROCESSOR CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, QFP-64 |
| 文件頁數(shù)： | 14/55頁 |
| 文件大小： | 387K |
| 代理商： | 935263513551 |
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1999 May 10
21
Philips Semiconductors
Preliminary specication
Universal Serial Bus (USB) CODEC
UDA1325
DSP extension port for enhanced playback audio processing
An external DSP can be used for adding extra sound processing features via the I2S inputs and outputs of the digital I/O
module. The UDA1325 supports the standard I2S-bus data protocol and the LSB-justified serial data input format with
word lengths of 16, 18 and 20 bits. Using the 4-pin digital I/O option the UDA1325 device acts as a master, controlling
the BCKO and WSO signals. Using the 6-pin digital I/O option GP2, GP3 and GP4 are output pins (master) and GP0,
GP1 and GP5 are input pins (slave).
The period of the WSO signal is determined by the number of samples in the 1 ms frame of the USB. This implies that
the WSO signal does not have a constant time period, but is jittery.
The characteristic timing of the I2S-bus signals is illustrated in Figs 5 and 6.
Fig.5 Timing of digital I/O input signals.
handbook, full pagewidth
MGK003
WS
RIGHT
LSB
MSB
LEFT
BCK
DATA
tf
tr
th;WS
ts;WS
tBCK(H)
tBCK(L)
Tcy
ts;DAT
th;DAT
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