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| 型號： | 935260813112 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 2100 MHz, PDSO20 |
| 封裝： | 4.40 MM, PLASTIC, SOT-266-1, SSOP-20 |
| 文件頁數(shù)： | 14/23頁 |
| 文件大?。?/td> | 924K |
| 代理商： | 935260813112 |
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Information as of 2000-11-13
UMA1022M; Low cost dual frequency synthesizer for radio telephones
The UMA1022M BICMOS device integrates prescalers, programmable dividers, a crystal oscillator/buffer and phase
comparators to implement two phase-locked loops. The device is designed to operate from 3 NiCd or a single LiIon
cell in pocket phones, or from an external 3 V supply.
The synthesizers operate at RF input frequencies up to 2.1 GHz and 550 MHz. All divider ratios are supplied via a 3 -
wire serial programming bus. The reference divider uses a common, fully programmable part and a separate
subdivider section. In this way the comparison frequencies are related to each other allowing optimum isolation
between charge pump pulses.
Separate power and ground pins are provided to the analog (charge pump, prescaler) and digital (CMOS) circuits. An
independent supply for the crystal oscillator section allows maximum frequency stability. The ground leads should be
externally short-circuited to prevent large currents flowing across the die and thus causing damage. V
DD
and V
DDX
must be at the same potential. V
CCA
and V
CCB
must be equal to each other and equal to or greater than V
DD
(e.g. V
DD
=
3 V and V
CCA
= 5.5 V for wider VCO control voltage range).
The charge pump currents (phase detector gain) are fixed by internal resistances and controlled by the serial
interface. Only passive loop filters are necessary; the charge pumps function within a wide voltage compliance range
to improve the overall system performance.
Suitable pin layout is chosen to minimize coupling and interference between signals entering or leaving the chip.
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