參數(shù)資料
型號(hào): 935245770165
廠商: NXP SEMICONDUCTORS
元件分類: 多路復(fù)用及模擬開(kāi)關(guān)
英文描述: 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDSO5
封裝: PLASTIC, SC-88A, 5 PIN
文件頁(yè)數(shù): 5/20頁(yè)
文件大小: 102K
代理商: 935245770165
2002 May 15
13
Philips Semiconductors
Product specication
Bilateral switch
74HC1G66; 74HCT1G66
AC WAVEFORMS
Fig.14 The input (Vis) to output (Vos) propagation
delays.
handbook, halfpage
MNA087
tPLH
tPHL
VM
(1)
VM
(1)
Vis
Vos
GND
VI
VOH
(2)
VOL
(2)
(1) For HC1G VM = 50%
For HCT1G VM = 1.3 V.
(2) VOL and VOH are the typical output voltage drop that occur with
the output load.
Fig.15 The turn-on and turn-off times.
tPLZ
tPHZ
outputs
disabled
outputs
enabled
VY
(3)
VX
(2)
outputs
enabled
OUTPUT
LOW-to-OFF
OFF-to-LOW
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
E INPUT
VI
VCC
VM
(1)
GND
tPZL
tPZH
VM
(1)
VM
(1)
(1) For HC1G VM = 50%; VI = GND to VCC
For HCT1G VM = 1.3 V; VI = GND to 3.0 V.
(2) VX = 10% of signal amplitude.
(3) VY = 90% of signal amplitude.
Fig.16 Test circuit for measuring AC performance.
handbook, halfpage
open
50 pF
RL = 1 k
VCC
VI
VO
MNA090
D.U.T.
CL
RT
PULSE
GENERATOR
S1
Definitions for test circuit:
CL = load capacitance including jig and probe capacitance
(see “AC characteristics” for values)
RT = termination resistance should be equal to the output
impedance Zo of the pulse generator.
TEST
S1
tPLH/tPHL
open
tPLZ/tPZL
VCC
tPHZ/tPZH
GND
Fig.17 Input pulse definitions.
MNA089
tTHL (tf)tTLH (tr)
VM
(1)
tW
POSITIVE
INPUT PULSE
NEGATIVE
INPUT PULSE
0 V
AMPLITUDE
90%
10%
tTLH (tr)tTHL (tf)
VM
(1)
tW
0 V
AMPLITUDE
90%
10%
tr =tf = 6 ns, when measuring fmax, there is no constraint on tr,tf with
50% duty factor.
(1) For HC1G66: VM = 50%; VI = GND to VCC
For HCT1G66: VM = 1.3 V; VI = GND to 3.0 V.
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