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參數(shù)資料
| 型號(hào)： | 935243950518 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, SOT-407, LQFP-100 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大?。?/td> | 122K |
| 代理商： | 935243950518 |
1996 Jun 20
5
Philips Semiconductors
Preliminary specication
Decoder with High-Performance Scaler
(HPS) for Image Port (PELICAN)
SAA7112
Fig.2 Block diagram (continued from Fig.1).
c
a
b
handbook, full pagewidth
MGE860
INPUT
ACQUISITION
CONTROL
FIR-FILTER
LUMINANCE
FIR FILTER
CHROMINANCE
PRESCALING
LUMINANCE
PRESCALING
CHROMINANCE
4 : 2 : 2
BCS
CONTROL
LINE
FIFO
BUFFER
VERTICAL
SCALING
PROCESSOR
HORIZONTAL
PHASE SCALING
LUMINANCE
HORIZONTAL
PHASE SCALING
CHROMINANCE
LINE MEMORY
1H * 16 BIT
IMAGE
PORT
PIN
MAPPING
VIDEO
FIFO
32
× 32
32
TO
8 (16)
MUX
FIFO
CONTROL
TEXT
FIFO
16
× 32
VIDEO / TEXT
ARBITER
FIFO
CONTROL
32
TO
8 (16)
MUX
YUV
OUTPUT
FORMAT
OUTPUT
ACQUISITION
CONTROL
TXT
INTERFACE
GENERAL
PURPOSE
TEXTSLICER
EVENT
CONTROLLER
LPB
VIDEO
OUT
FF
IP
OUT
LPB
PROG
PROGRAMMING
REGISTER
ARRAY
SLEEP MODE REGISTER
PROG. PORT CONTROL
A / B
REGISTER
MUX
CLOCK MULTIPLEXER
INCLUDING
TCB
HOST PORT PIN MAPPING
I2C-BUS
IPD7
to
IPD0
IRH
IRV
IDQE
ICRQF
ITRDY
ICLK
ITRI
HPD7
to
HPD0
HCST
HACNSD
HDSNSC
HRWNF
HADP
chroma of 16-bit output mode
from
event
controller
data, clock, H, V, FID
and qualifier from
scaler input
selector
data, clock and
reference signals
from text input
selector
chroma of 16-bit
input mode
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