參數(shù)資料
型號(hào)： 935189590112
廠(chǎng)商： NXP SEMICONDUCTORS
元件分類(lèi)： 算術(shù)邏輯單元
英文描述： HCT SERIES, 4-BIT ADDER/SUBTRACTOR, PDSO16
封裝： PLASTIC, TSSOP-16
文件頁(yè)數(shù)： 7/8頁(yè)
文件大小： 59K
代理商： 935189590112
December 1990
7
Philips Semiconductors
Product specication
4-bit binary full adder with fast carry
74HC/HCT283
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see
“74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT types
The value of additional quiescent supply current (
ICC) for a unit load of 1 is given in the family specifications.
To determine
ICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND = 0 V; tr =tf = 6 ns; CL = 50 pF
INPUT
UNIT LOAD COEFFICIENT
CIN
B2, A2, A1
B1
1.50
1.00
0.40
B4, A4, A3, B3
0.50
SYMBOL
PARAMETER
Tamb (°C)
UNIT
TEST CONDITIONS
74HCT
VCC
(V)
WAVEFORMS
+25
40 to +85
40 to +125
min.
typ.
max.
min.
max.
min.
max.
tPHL/ tPLH
propagation delay
CIN to ∑1
18
31
39
47
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
CIN to ∑2
25
43
54
65
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
CIN to ∑3
27
46
58
69
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
CIN to ∑4
31
53
66
80
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
An or Bn to ∑n
29
49
61
74
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
CIN to COUT
27
46
58
69
ns
4.5
Fig.6
tPHL/ tPLH
propagation delay
An or Bn to COUT
28
48
60
72
ns
4.5
Fig.6
tTHL/ tTLH
output transition time
7
15
19
22
ns
4.5
Fig.6
相關(guān)PDF資料
PDF描述
933825640005 HCT SERIES, 4-BIT ADDER/SUBTRACTOR, UUC
935189020118 HC/UH SERIES, 4-BIT ADDER/SUBTRACTOR, PDSO16
935189290118 HCT SERIES, 4-BIT ADDER/SUBTRACTOR, PDSO16
935189300118 HC/UH SERIES, 4-BIT ADDER/SUBTRACTOR, PDSO16
933757290653 HC/UH SERIES, 4-BIT ADDER/SUBTRACTOR, PDSO16
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