參數(shù)資料
型號(hào)： 935077580157
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： PLASTIC, SOT-318, QFP-80
文件頁(yè)數(shù)： 11/30頁(yè)
文件大小： 230K
代理商： 935077580157
1996 Oct 25
19
Philips Semiconductors
Preliminary specication
Progressive scan-Zoom and Noise
reduction IC (PROZONIC)
SAA4990H
Microcontroller interface (SNERT)
In the microcontroller interface the external signals SNDA
and SNCL are processed to address and data. Data
enable pulses are derived from the received addresses.
The data enable pulses are used elsewhere for input
enabling the delivered data into various control registers.
The microcontroller interface operates in a few stages:
1. SNCL positive and negative edges are sampled
2. on each negative edge of SNCL and SNDA data is
shifted in a shift register
3. starting from phase 0, a counter counts positive edges
of SNCL
4. during phase 7, but waited for a negative edge of
SNCL, so after the 8th negative edge of SNCL, an
address latch enable pulse is made, whereby the shift
register contents are taken over in the address register
5. in the address range 10H to 27H, the addresses are
decoded in two steps
6. during phase 15, but waited for a negative edge of
SNCL, so after the 16th negative edge of SNCL, the
address has been decoded and will be passed to any
of the data enable pulses.
For each of the functions vert_start_box and
vert_stop_box, two addresses are used, in which the LSB
from the address is taken as an extra MSB for the data.
This is done because vert_start_box and vert_stop_box
must be supplied with 9-bit data. All other data from the
SNERT-bus has only relevance in the 7:0 range.
During the data phases (phase 8 to 15), each negative
edge produces a shift pulse for the movie phase detect
circuit that produces output data on the SNDA signal. The
data enables for the movie phase detect circuit are active
in all of the data phases, when an address 26 or 27 has
been decoded.
After an MPD read transmission it is necessary to send a
second (dummy) transmission to the PROZONIC.
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VI
input voltage
0.5
+7
V
VDDD
digital supply voltage
0.5
+7
V
VDDA
analog supply voltage
0.5
+7
V
Tstg
storage temperature
65
+150
°C
Tamb
operating ambient temperature
0
70
°C
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