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參數(shù)資料
| 型號： | 933958210623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | F/FAST SERIES, 9 1-BIT DRIVER, TRUE OUTPUT, PDSO24 |
| 封裝： | PLASTIC, SO-24 |
| 文件頁數(shù)： | 3/18頁 |
| 文件大小： | 152K |
| 代理商： | 933958210623 |
Philips Semiconductors
Product specification
74F841/74F842/74F843/
74F845/74F846
Bus interface latches
1999 Jun 23
11
AC ELECTRICAL CHARACTERISTICS for 74F841/74F842
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
Dn to Qn
74F841
Waveform 1, 2
2.0
2.5
4.0
4.5
7.5
2.0
2.5
8.0
ns
tPLH
tPHL
Propagation delay
LE to Qn
74F841
Waveform 1, 2
4.5
4.0
6.5
6.0
9.5
9.0
4.0
3.5
10.0
9.5
ns
tPLH
tPHL
Propagation delay
Dn to Qn
74F842
Waveform 1, 2
3.5
3.0
5.5
5.0
8.5
8.0
4.5
4.0
9.0
8.5
ns
tPLH
tPHL
Propagation delay
LE to Qn
74F842
Waveform 1, 2
5.0
4.5
7.0
6.5
10.0
9.0
3.0
10.5
9.5
ns
tPZH
tPZL
Output enable time
High or Low-level OEn to Qn or Qn
Waveform 5
Waveform 6
2.5
4.0
4.5
6.0
8.0
9.5
2.0
3.0
8.5
10.5
ns
tPHZ
tPLZ
Output disable time
High or Low-level OEn to Qn or Qn
Waveform 5
Waveform 6
1.0
4.5
5.0
8.0
1.0
8.5
ns
AC SETUP REQUIREMENTS for 74F841/74F842
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MIN
MAX
ts(H)
ts(L)
Setup time, High or Low
Dn to LE
Waveform 4
0.0
1.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to LE
74F841
Waveform 4
2.5
3.0
4.0
ns
tw(H)
LE pulse width, High
Waveform 4
3.5
4.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to LE
74F842
Waveform 4
3.0
3.5
4.5
ns
tw(H)
LE pulse width, High
Waveform 4
3.0
ns
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