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參數(shù)資料
| 型號： | 933906260623 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 計數(shù)器 |
| 英文描述： | F/FAST SERIES, ASYN NEGATIVE EDGE TRIGGERED 4-BIT UP BINARY COUNTER, PDSO14 |
| 封裝： | PLASTIC, SOT-108-1, SO-14 |
| 文件頁數(shù)： | 5/8頁 |
| 文件大?。?/td> | 75K |
| 代理商： | 933906260623 |
Philips Semiconductors
Product specification
74F393
Dual 4-bit binary ripple counter
1988 Nov 01
5
AC SETUP REQUIREMENTS
LIMITS
SYMBOL
PARAMETER
TEST
CONDITION
VCC = +5V
Tamb = +25°C
CL = 50pF, RL = 500
VCC = +5V ± 10%
Tamb = 0°C to +70°C
CL = 50pF, RL = 500
UNIT
MIN
TYP
MAX
MIN
MAX
tW(H)
tW(L)
CPn Pulse width
High or Low
Waveform 1
4.5
3.5
5.0
4.0
ns
tW(H)
MR Pulse width
High
Waveform 2
3.5
4.5
ns
tREC
Recovery time
MR to CPn
Waveform 2
2.5
3.0
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
VM
1/fMAX
tPHL
tw(L)
Qna, Qnb
tw(H)
VM
CPn
tPLH
SF00709
Waveform 1.
Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
VM
trec
tPHL
MR
CPn
Qna, Qnb
VM
tw(H)
SF00708
Waveform 2.
Master Reset Pulse Width, Master Reset to
Output Delay, and Master Reset to Clock Recovery Time
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
tTHL (tf )
INPUT PULSE REQUIREMENTS
rep. rate
tw
tTLH
tTHL
1MHz
500ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
RL = Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
CL = Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
tTHL (tf )
tTLH (tr )
AMP (V)
amplitude
3.0V
1.5V
VM
SF00006
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