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參數(shù)資料
| 型號： | 933897020118 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PDSO8 |
| 封裝： | PLASTIC, SOT-96, SO-8 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 144K |
| 代理商： | 933897020118 |
September 1994
5
Philips Semiconductors
Product specication
Supply circuit with power-down for
telephone set peripherals
TEA1081
Input and output currents I1 and IO (pins 1 and 7)
The maximum available current into pin 1 (I1) is
determined by:
The minimum line current (ILINEmin) that is available for
the telephone set
The specified minimum input current (ILNmin) for the
speech/transmission circuit.
That is I1max = ILINEmin ILNmin.
At VLN(rms) < 150 mV, the input current I1 is approximately:
I1 =IINT +k × IO (mA)
Where:
IINT = internal supply current (0.8 mA at VLN = 4 V);
k = correction factor (k < 1.1 for the specified output
current range).
With large line signals the instantaneous line voltage may
drop below VO + 0.4 V. Normally (when VLN >VO + 0.4 V),
instantaneous current flows from LN to QS (pin 1 to pin 7)
to the output load.
When VLN <VO + 0.4 V, the instantaneous current is
diverted to pin 2 to prevent distortion of the line signal.
Fig.4 Output voltage as a function of line voltage.
RV connected between QS and VA.
(1) I1 = 5 mA.
(2) I1 = 20 mA.
(3) I1 = 30 mA; not valid for TEA1081T.
handbook, halfpage
0
6
4
2
0
210
MLC169
46
8
(1)
(2)
(3)
VO
(V)
V
(V)
LN
V
R = 100 k
75 k
50 k
Input current at VLN(rms) = 1 V and without RV
approximates to:
I1 = IINT +2 × IO (mA)
The maximum supply current (within the specified output
current limits) available for peripheral devices is shown by:
IOmax =
Where:
ILINEmin is the minimum line current of the telephone set;
ILNmin is the specified minimum input current of the
speech/transmission circuit.
Input low-pass lter: IF (pin 5)
The input impedance between LN and VN at audio
frequencies is determined by the filter elements CL
(between pins 1 and 5), RL (between pins 5 and 7) and the
internal resistor RS (typical value 20 ).
At audio frequencies the TEA1081 behaves as an inductor
of the value LI = CL × RL × RS (H). The typical value of LI at
CL = 2.2 F and RL = 100 k is 4.4 H.
Amplier decoupling: AD (pin 3)
To ensure stability, a 68 pF decoupling capacitor is
required between AD (pin 3) and LN (pin 1).
If IOmin < 1.5 mA, a 47 pF capacitor has to be added
between AD (pin 3) and VA (pin 6).
Power-down inputs: PD and SP (pins 4 and 8)
During pulse dialling or register recall, or if the input current
to pin 1 is insufficient to maintain the output current, the
supply to peripheral devices can be switched off by
activating the PD input at pin 4. With PD = HIGH, the input
current is reduced to 40
A (typ.) at V
LN = 4 V and the
internal circuits are isolated from the load at QS (pin 7).
The power-down circuit is supplied via the SP input (pin 8).
SP can be wired to QS in conditions where VO >VSPmin
during line interruptions. When VO <VSPmin, SP should be
wired to an external supply point (e.g. to VCC of the
TEA1060 family circuit).
When power-down is not required, the PD and SP inputs
can be left open-circuit.
I
LINEmin
I
LNmin
–
I
INT
–
2
-----------------------------------------------------------
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