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參數資料
| 型號： | 933893140602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | F/FAST SERIES, 10 1-BIT DRIVER, INVERTED OUTPUT, PDSO24 |
| 封裝： | PLASTIC, SO-24 |
| 文件頁數： | 5/18頁 |
| 文件大?。?/td> | 152K |
| 代理商： | 933893140602 |
Philips Semiconductors
Product specification
74F841/74F842/74F843/
74F845/74F846
Bus interface latches
1999 Jun 23
13
AC ELECTRICAL CHARACTERISTICS for 74F846
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
Dn to Qn
Waveform 1, 2
3.5
3.0
5.5
5.0
8.5
8.0
3.0
9.5
8.5
ns
tPLH
tPHL
Propagation delay
LE to Qn
Waveform 1, 2
5.0
4.5
7.0
6.5
10.0
9.0
5.0
4.5
10.5
9.5
ns
tPLH
Propagation delay
PRE to Qn
Waveform 3
3.5
5.5
8.5
3.0
9.5
ns
tPHL
Propagation delay
MR to Qn
Waveform 3
5.0
7.0
10.0
4.5
10.5
ns
tPZH
tPZL
Output enable time
High or Low-level OEn to Qn
Waveform 5
Waveform 6
2.5
4.0
5.0
6.0
7.5
9.5
2.0
3.0
8.0
10.5
ns
tPHZ
tPLZ
Output disable time
High or Low-level OEn to Qn
Waveform 5
Waveform 6
1.0
4.5
5.0
8.0
1.0
8.5
ns
AC SETUP REQUIREMENTS for 74F846
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500
MIN
TYP
MIN
MAX
ts(H)
ts(L)
Setup time, High or Low
Dn to LE
Waveform 4
0.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to LE
Waveform 4
3.0
4.0
3.0
4.0
ns
tw(H)
LE pulse width, High
Waveform 4
3.0
ns
tw(L)
PRE pulse width, Low
Waveform 3
4.0
5.0
ns
tw(H)
MR pulse width, Low
Waveform 3
4.0
5.0
ns
tREC
PRE recovery time
Waveform 3
0.0
ns
tREC
MR recovery time
Waveform 3
3.5
4.5
ns
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