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參數(shù)資料
| 型號(hào)： | 933893120602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 鎖存器 |
| 英文描述： | F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16 |
| 封裝： | 3.90 MM, PLASTIC, MS-012AC, SOT-109-1, SO-16 |
| 文件頁數(shù)： | 8/10頁 |
| 文件大?。?/td> | 88K |
| 代理商： | 933893120602 |
Philips Semiconductors
Product specification
74F173
Quad D-type flip–flop (3-State)
August 31, 1990
7
MR
VM
tw(H)
VM
CP
trec
VM
Qn
tPHL
SF00295
Waveform 2. Master reset pulse width, master reset to output
delay and master reset to clock recovery time
VM
tsu(L)
th(L)
tsu(H)
th(H)
En, Dn
CP
SF00296
Waveform 3. Data and enable setup time and hold times
VM
tPHZ
tPZH
OE
VOH -0.3V
0V
Qn
10%
90%
SF00297
Waveform 4. 3-state output enable time to high level, output
disable time from high level and transition time to high level
VM
tPLZ
tPZL
VOL +0.3V
3.5V
OE
Qn
10%
90%
SF00298
Waveform 5. 3-state output enable time to low level, output
disable time from low level and transition time to low level
Notes to AC waveforms
1. For all waveforms, VM = 1.5V.
2. The shaded areas indicate when the input is permitted to change for predictable output performance.
TEST CIRCUIT AND WAVEFORMS
tw
90%
VM
10%
90%
VM
10%
90%
VM
10%
90%
VM
10%
NEGATIVE
PULSE
POSITIVE
PULSE
tw
AMP (V)
0V
tTHL (tf )
INPUT PULSE REQUIREMENTS
rep. rate
tw
tTLH
tTHL
1MHz
500ns
2.5ns
Input Pulse Definition
VCC
family
74F
D.U.T.
PULSE
GENERATOR
RL
CL
RT
VIN
VOUT
Test Circuit for Open Collector Outputs
DEFINITIONS:
RL = Load resistor;
see AC electrical characteristics for value.
CL = Load capacitance includes jig and probe capacitance;
see AC electrical characteristics for value.
RT = Termination resistance should be equal to ZOUT of
pulse generators.
tTHL (tf )
tTLH (tr )
AMP (V)
amplitude
3.0V
1.5V
VM
RL
7.0V
SF00128
TEST
SWITCH
tPLZ
closed
tPZL
closed
All other
open
SWITCH POSITION
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