參數(shù)資料
型號(hào)： 933824060005
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC
封裝： DIE
文件頁數(shù)： 4/7頁
文件大?。?/td> 51K
代理商： 933824060005
December 1990
4
Philips Semiconductors
Product specication
Dual JK ip-op with reset; negative-edge trigger
74HC/HCT107
Fig.4 Functional diagram.
Fig.5 Logic diagram (one flip-flop).
FUNCTION TABLE
Note
1. H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the HIGH-to-LOW CP transition
L = LOW voltage level
I = LOW voltage level one set-up time prior to the HIGH-to-LOW CP transition
q = lower case letters indicate the state of the referenced output one set-up time prior to the HIGH-to-LOW CP
transition
X = don’t care
↓ = HIGH-to-LOW CP transition
OPERATING MODE
INPUTS
OUTPUTS
nRnCP
J
K
Q
asynchronous reset
L
X
L
H
toggle
H
↓
hh
qq
load “0” (reset)
H
↓
Ih
L
H
load “1” (set)
H
↓
hI
H
L
hold “no change”
H
↓
II
q
相關(guān)PDF資料
PDF描述
933824170005 HCT SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, UUC
935186300118 HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
935186310118 HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14
933669020652 HC/UH SERIES, DUAL NEGATIVE EDGE TRIGGERED J-K FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP14
933824900005 HCT SERIES, OTHER DECODER/DRIVER, INVERTED OUTPUT, UUC
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