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參數(shù)資料
| 型號： | 933821940602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 編、解碼器及復(fù)用、解復(fù)用 |
| 英文描述： | F/FAST SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDIP16 |
| 封裝： | 0.300 INCH, PLASTIC, SOT-38-4, DIP-16 |
| 文件頁數(shù)： | 11/11頁 |
| 文件大?。?/td> | 150K |
| 代理商： | 933821940602 |
Philips Semiconductors - PIP - 74F258A; Quad 2-line to 1-line selector/multiplexer, inverting (3-State)
Product Information
74F258A; Quad 2-
line to 1-line
selector/multiplexer,
inverting (3-State)
Information as of 2003-04-22
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topGeneral description
The 74F258A has four identical 2-input multiplexers with 3-State outputs which select 4 bits of data from two
sources under control of a common Select (S) input. The I0n inputs are selected when the Select input is Low
and the I1n inputs are selected when the Select input is High. Data appears at the outputs in inverted form.
The 74F258A is the logical implementation of a 4-pole, 2-position switch where the position of the switch is
determined by the logic level supplied to the Select input. Outputs are forced to a High impedance ‘‘off” state
when the Output Enable input (OE) is High. All but one device must be in the High impedance state to avoid
currents that would exceed the maximum ratings if outputs are tied together. Design of the output signals must
ensure that there is no overlap when outputs of 3-State devices are tied together.
topFeatures
q
Multifunction capability
q
Non-inverting data path
q
3-State outputs
q
See 74F257A for non-inverting version
topApplications
AN202_1: Testing and specifying FAST logic (date 01-Jun-87)
AN2021_1: Thermal considerations for FAST logic products (date 13-Mar-95)
AN203_2: Test Fixtures for High Speed Logic (date 02-Apr-98)
AN216_2: Arbitration in shared resource systems (date 18-Jul-88)
file:///G|/imaging/BITTING/CPL/20030424/04232003_9/PHGL/_HTML04232003/N74F258AN.html (1 of 3) [Apr-30-2003 3:02:49 PM]
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