參數(shù)資料
型號: 933774940529
廠商: NXP SEMICONDUCTORS
元件分類: 微控制器/微處理器
英文描述: 2 CHANNEL(S), 1M bps, SERIAL COMM CONTROLLER, PQCC44
封裝: PLASTIC, MO-047AC, SOT-187-2, LCC-44
文件頁數(shù): 13/34頁
文件大小: 313K
代理商: 933774940529
Philips Semiconductors
Product specification
SCN2681
Dual asynchronous receiver/transmitter (DUART)
1998 Sep 04
20
TIMING DIAGRAMS (Continued)
NOTES:
1. INTRN or OP3 – OP7 when used as interrupt outputs.
2. The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from themidpoint of the switching signal, VM, to a
point 0.5V above VOL. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and test environment are pronounced
and can greatly affect the resultant measurement.
VM
VOL +0.5V
VOL
RDN
OR
WRN
INTERRUPT1
OUTPUT
tIR
SD00090
Figure 6. Interrupt Timing
tCLK
tCTC
tRx
tTx
X1/CLK
CTCLK
RxC
TxC
+5V
1K
X1
X2
3.6864MHz
X1
C1
C2
DRIVING FROM
EXTERNAL SOURCE
SCN2681
74LS04
CLOCK
TO OTHER
CHIPS
1K
+5V
CRYSTAL SERIES RESISTANCE3 SHOULD BE LESS THAN 180
R1: 100K - 1Meg (See design note)
C1 = C2: 0-5pF + (STRAY < 5pF)
tCLK
tCTC
tRx
tTx
OPEN
When using an external clock it is preferred to drive X2 and leave X1 open.
X2 is the input to the internal driver, while X1 is the output.
TO THE REST
OF THE DUART
CIRCUITS
R1
U1
R1 is only required if U1 will not drive to X2 high level.
Previous specifications indicated X2 should be grounded and X1
should be driven. This is still acceptable. It is electrically easier to drive
the amplifier input than to overdrive its output.
R2
R2 = 50k
to 150k
SD00091
Figure 7. Clock Timing
tTXD
tTCS
1 BIT TIME
(1 OR 16 CLOCKS)
TxD
TxC
(INPUT)
TxC
(1X OUTPUT)
SD00092
Figure 8. Transmit
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