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參數(shù)資料
| 型號(hào)： | 933738340602 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 模擬波形發(fā)生器 |
| 英文描述： | QUAD PULSE; RECTANGULAR, TIMER, PDSO16 |
| 封裝： | 7.50 MM, PLASTIC, SOT-162, SO-16 |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 152K |
| 代理商： | 933738340602 |
Philips Semiconductors
Product data
NE558
Quad timer
2003 Feb 14
3
DC AND AC ELECTRICAL CHARACTERISTICS
Tamb = 25 °C, VCC = +5 V to +15 V, unless otherwise specified.
SYMBOL
PARAMETER
TEST CONDITIONS
Min
Typ
Max
UNIT
VCC
Supply voltage
4.5
16
V
ICC
Supply current
VCC = Reset = 15 V
16
36
mA
Timing accuracy (t = RC)
R = 2 k
to 100 k; C = 1 F
tA
Initial accuracy
±2
5
%
tA/T
Drift with temperature
30
150
ppm/
°C
tA/VS
Drift with supply voltage
0.1
0.9
%/V
VTRIG
Trigger voltage1
VCC = 15 V
0.8
2.4
V
ITRIG
Trigger current
Trigger = 0 V
5
100
A
VRESET
Reset voltage2
0.8
2.4
V
IRESET
Reset current
Reset
50
500
A
VTH
Threshold voltage
0.63
×VCC
V
Threshold leakage
15
nA
VOUT
Output voltage3
IL = 10 mA
0.1
0.4
V
VOUT
Out ut voltage
IL = 100 mA
1.0
2.0
V
Output leakage
10
500
nA
tPD
Propagation delay
1.0
s
tR
Rise time of output
IL = 100 mA
100
ns
tF
Fall time of output
IL = 100 mA
100
ns
NOTES:
1. The trigger functions only on the falling edge of the trigger pulse only after previously being HIGH. After reset, the trigger must be brought
HIGH and then LOW to implement triggering.
2. For reset below 0.8 V, outputs set LOW and trigger inhibited. For reset above 2.4 V, trigger enabled.
3. The NE558 output structure is open-collector, which requires a pull-up resistor to VCC to sink current. The output is normally LOW sinking
current.
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