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參數(shù)資料
| 型號(hào)： | 933668850652 |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 多路復(fù)用及模擬開關(guān) |
| 英文描述： | QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, PDIP14 |
| 封裝： | PLASTIC, DIP-14 |
| 文件頁數(shù)： | 7/14頁 |
| 文件大?。?/td> | 103K |
| 代理商： | 933668850652 |
December 1990
2
Philips Semiconductors
Product specication
Quad bilateral switches
74HC/HCT4016
FEATURES
Low “ON” resistance:
160
(typ.) at VCC = 4.5 V
120
(typ.) at VCC = 6.0 V
80
(typ.) at VCC = 9.0 V
Individual switch controls
Typical “break before make” built in
Output capability: non-standard
ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT4016 are high-speed Si-gate CMOS
devices and are pin compatible with the “4016” of the
“4000B” series. They are specified in compliance with
JEDEC standard no. 7A.
The 74HC/HCT4016 have four independent analog
switches (transmission gates).
Each switch has two input/output terminals (Yn,Zn) and an
active HIGH enable input (En). When En is connected to
VCC, a low bidirectional path between Yn and Zn is
established (ON condition). When En is connected to
ground (GND), the switch is disabled and a high
impedance between Yn and Zn is established (OFF
condition).
Current through a switch will not cause additional
VCC current provided the voltage at the terminals of the
switch is maintained within the supply voltage range;
VCC >> (VY,VZ) >> GND. Inputs Yn and Zn are electrically
equivalent terminals.
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns
Notes
1. CPD is used to determine the dynamic power dissipation (PD in W):
PD = CPD × VCC2 × fi +∑ {(CL + CS) × VCC2 × fo } where:
fi = input frequency in MHz
fo = output frequency in MHz
∑ {(CL + CS) × VCC2 × fo} = sum of outputs
CL = output load capacitance in pF
CS = max. switch capacitance in pF
VCC = supply voltage in V
2. For HC the condition is VI = GND to VCC
For HCT the condition is VI = GND to VCC 1.5 V
ORDERING INFORMATION
See
“74HC/HCT/HCU/HCMOS Logic Package Information”.
SYMBOL
PARAMETER
CONDITIONS
TYPICAL
UNIT
HC
HCT
tPZH/ tPZL
turn “ON” time En to VOS
CL = 15 pF; RL =1 k;
VCC = 5 V
16
17
ns
tPHZ/ tPLZ
turn “OFF” time En to VOS
14
20
ns
CI
input capacitance
3.5
pF
CPD
power dissipation capacitance per switch
notes 1 and 2
12
pF
CS
max. switch capacitance
5
pF
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