參數(shù)資料
型號(hào)： 933373460653
廠商： NXP SEMICONDUCTORS
元件分類： 鎖存器
英文描述： POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16
封裝： PLASTIC, SOT-109-1, SO-16
文件頁(yè)數(shù)： 2/5頁(yè)
文件大?。?/td> 61K
代理商： 933373460653
January 1995
2
Philips Semiconductors
Product specication
Hex D-type ip-op
HEF40174B
MSI
DESCRIPTION
The HEF40174B is a hex edge-triggered D-type flip-flop
with six data inputs (D0 to D5), a clock input (CP), an
overriding asynchronous master reset input (MR), and six
buffered outputs (O0 to O5). Information on D0 to D5 is
transferred to O0 to O5 on the LOW to HIGH transition of
CP if MR is HIGH. When LOW, MR resets all flip-flops
(O0 to O5 = LOW) independent of CP and D0 to D5.
Fig.1 Functional diagram.
FAMILY DATA, IDD LIMITS category MSI
See Family Specifications
HEF40174BP(N): 16-lead DIL; plastic
(SOT38-1)
HEF40174BD(F):
16-lead DIL; ceramic (cerdip)
(SOT74)
HEF40174BT(D):
16-lead SO; plastic
(SOT109-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
PINNING
FUNCTION TABLE
Notes
1. H = HIGH state (the more positive voltage)
L = LOW state (the less positive voltage)
X = state is immaterial
= positive-going transition
= negative-going transition
D0 to D5
data inputs
CP
clock input (LOW to HIGH; edge-triggered)
MR
master reset input (active LOW)
O0 to O5
buffered outputs
INPUTS
OUTPUT
CP
D
MR
O
HH
H
LH
L
X
H
no change
XX
L
相關(guān)PDF資料
PDF描述
933296750652 POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDIP16
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