參數(shù)資料
型號(hào)： 932S200BFLFT
廠(chǎng)商： INTEGRATED DEVICE TECHNOLOGY INC
元件分類(lèi)： 時(shí)鐘產(chǎn)生/分配
英文描述： 133 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封裝： 0.300 INCH, GREEN, SSOP-56
文件頁(yè)數(shù)： 9/14頁(yè)
文件大?。?/td> 130K
代理商： 932S200BFLFT
4
ICS932S200
0427C—07/03/02
Power Management Requirements:
Note:
1. Clock on/off latency is defined in the number of rising edges of free running PCICLKs between the clock disable goes
low/high to the first valid clock comes out of the device.
2. Power up latency is when PWR_DWN# goes inactive (high to when the first valid clocks are dirven from the device.
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CPU_STOP# Timing Diagram
CPU_STOP# is an asynchronous input to the clock synthesizer. It is used to turn off the CPU and 3V66 clocks for
low power operation. CPU_STOP# is asserted asynchronously by the external clock control logic with the rising edge
of free running PCI clock (and hence CPU clock) and must be internally synchronized to the external output. All other
clocks will continue to run while the CPU clocks are disabled. The CPU clocks must always be stopped in a low state
and started in such a manner as to guarantee that the high pulse width is a full pulse.
Notes:
1. All timing is referenced to the internal CPUCLK.
2. The internal label means inside the chip and is a reference only.
This in fact may not be the way that the control is designed.
3. 3V66 clocks also stop/start before
4. PD# and PCI_STOP# are shown in a high state.
5. Diagrams shown with respect to 133MHz. Similar operation when
CPU is 100MHz
CPUCLK
(internal)
(externall)
PCICLK
PCI_STOP#
CPU_STOP#
PD#
CPUCLK
3V66
相關(guān)PDF資料
PDF描述
932S203AFLF 133.3 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
950201AFLFT 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
9FG1201HFLF 400 MHz, OTHER CLOCK GENERATOR, PDSO56
935270050128 4 CHANNEL(S), 5M bps, SERIAL COMM CONTROLLER, PQFP64
935269195118 8 I/O, PIA-GENERAL PURPOSE, PDSO16
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
932S203AFLN 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
932S203AFLNT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
932S203AGLF 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
932S203AGLFT 功能描述:時(shí)鐘發(fā)生器及支持產(chǎn)品 SERVER MAIN CLOCK RoHS:否 制造商:Silicon Labs 類(lèi)型:Clock Generators 最大輸入頻率:14.318 MHz 最大輸出頻率:166 MHz 輸出端數(shù)量:16 占空比 - 最大:55 % 工作電源電壓:3.3 V 工作電源電流:1 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-56
932S203YFLXT 制造商:IDT 制造商全稱(chēng):Integrated Device Technology 功能描述:Frequency Generator with 133MHz Differential CPU Clocks
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