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參數(shù)資料
| 型號(hào)： | 9321 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | DUAL 1-OF-4 DECODER |
| 中文描述： | 雙1 - - 4解碼器 |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 124K |
| 代理商： | 9321 |
Switching Characteristics
V
CC
e a
5.0V, T
A
e a
25
§
C (See Section 1 for test waveforms and output load)
Symbol
Parameter
C
L
e
15 pF
Units
Min
Max
t
PLH
t
PHL
Propagation Delay, An to On
20
21
ns
t
PLH
t
PHL
Propagation Delay, E to On
14
18
ns
Functional Description
The 9321 consists of two separate decoders each designed
to accept two binary weighted inputs and provide four mutu-
ally exclusive active LOW outputs as shown in the logic
symbol. Each decoder can be used as a 4-output demulti-
plexer by using the enable as a data input.
Truth Table
(Each Decoder)
Inputs
Outputs
E
A0
A1
O0
O1
O2
O3
L
L
L
L
H
L
H
L
H
X
L
L
H
H
X
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
H
H
H
L
H
H
e
HIGH Voltage Level
L
e
LOW Voltage Level
X
e
Immaterial
Logic Diagram
TL/F/10209–3
3
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 9321DMQB | DUAL 1-OF-4 DECODER |
| 9321FMQB | DUAL 1-OF-4 DECODER |
| 9322DMQB | 2-Input Digital Multiplexer |
| DM9322J | 2-Input Digital Multiplexer |
| DM9322N | 2-Input Digital Multiplexer |
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