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參數(shù)資料
| 型號： | 9304-01 |
| 廠商： | PEREGRINE SEMICONDUCTOR CORP |
| 元件分類： | 諧振器 |
| 英文描述： | 1- 7 GHz Low Power CMOS Divide-by-2 Prescaler |
| 中文描述： | 9304 SERIES, PRESCALER, CDSO8 |
| 封裝： | CERAMIC, SOIC-8 |
| 文件頁數(shù)： | 2/6頁 |
| 文件大?。?/td> | 213K |
| 代理商： | 9304-01 |
Product Specification
PE9304
Page 2 of 7
2003-2006 Peregrine Semiconductor Corp. All rights reserved.
Document No. 70-0152-02
│ UltraCMOS RFIC Solutions
Table 2. Pin Descriptions
Table 3. Absolute Maximum Ratings
Device Functional Considerations
The PE9304 divides a 1000 MHz – 7000 MHz
input signal by a factor of two thereby producing
an output frequency at half the input frequency. To
work properly at higher frequencies, the input and
output signals (pins 2 & 7) must be AC coupled
via an external capacitor, as shown in the test
circuit in Figure 5.
The ground pattern on the board should be made
as wide as possible to minimize ground
impedance.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS
devices are immune to latch-up.
Figure 3. Pin Configuration
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS device, observe
the same precautions that you would use with
other ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 3.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
PE9304
1
2
3
4
8
7
6
5
IN
GND
DEC
GND
OUT
VDD
NC
GND
Pin No.
Pin
Name
Description
1
VDD
Power supply pin. Bypassing is required
(eg. 1000pF & 100pF).
2
IN
Input signal pin. Should be coupled with a
capacitor (eg. 2.2pF).
3
DEC
Decoupling Pin. This pin should have two
capacitors in parallel (eg. 1000pf, 10nF)
4
GND
Ground pin. Ground pattern on the board
should be as wide as possible to reduce
ground impedance.
5
GND
Ground pin.
6
NC
No connection. This pin should be left
open.
7
OUT
Divided frequency output pin. This pin
should be coupled with a capacitor
(eg. 2.2pF).
8
GND
Ground Pin.
Symbol
Parameter/Conditions
Min
Max
Units
VDD
Supply voltage
3.3
V
Pin
Input Power
+12
dBm
VIN
Voltage on input
-0.3
VDD
+0.3
V
TST
Storage temperature range
-65
150
°C
TOP
Operating temperature range
-40
85
°C
VESD
ESD voltage (Human Body
Model, MIL-STD 883 Method
3015.7)
500
V
ESD voltage (Machine Model,
JEDEC, JESD22-A114-B)
50
V
ESD voltage (Charged Device
Model, JEDEC, JESD22-
C101)
1000
V
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