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參數(shù)資料
| 型號(hào)： | 9120-08CS08LF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類： | 時(shí)鐘產(chǎn)生/分配 |
| 英文描述： | 33.868 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封裝： | 0.150 INCH, MS-012, SOIC-8 |
| 文件頁(yè)數(shù)： | 1/7頁(yè) |
| 文件大?。?/td> | 84K |
| 代理商： | 9120-08CS08LF |
Integrated
Circuit
Systems, Inc.
General Description
Features
0065D—11/18/02
ICS9120-08
ICS9120-09
XTAL
OSC
X1
14.318
MHz
X2(-08)
PD(-09)
REF (14.3MHz)
CLK3 (16.9MHz)
CLK2 (33.9MHz)
CLK1 (24.6MHz)
PLL
CLOCK
GEN
External
Crystal
Load Caps
÷2
Frequency Generator for Multimedia Audio Synthesis
Block Diagram
The ICS9120-08 and ICS 9120-09 are high performance
frequency generators designed to support stereo audio
codec systems. It offers both clock frequencies required
by stereo codecs such as the CS4231 and the AD1848
plus the clock needed for the OPL4 FM synthesizer.These
frequencies can be synthesized from the existing 14.318
MHz system clock or from the on-chip oscillator using a
14.318 MHz crystal (-08 only).
High accuracy, low jitter PLLs meet the 0.125% frequency
tolerance and -96dB signal-to-noise ratios required by 16
bit audio systems. Fast output clock edge rates minimize
board induced jitter.
Unlike competitive devices, the ICS9120-08 and
ICS9120-09 operate over the entire 3.0-5.5V range, with
the -09 providing power-down to minimize energy
consumption.
Generates 16.934 MHz and 24.576 MHz stereo
codec clocks plus the 33.868 MHz OPL4 clock
Single 14.318MHz crystal or system clock
reference
Buffered REFCLK output
0.125% frequency accuracy meets OPL4
specifications
100 ps one sigma jitter maintains 16 bit
performance
Output rise/fall times less than 2.0 nS
On chip loop filter components
3.3V - 5 V supply range
8 pin, 150mil SOIC package
Applications
Specifically designed to support the high
performance requirements of multimedia audio
systems.
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