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參數(shù)資料
| 型號： | 8XL54 |
| 英文描述： | LOW VOLTAGE CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLERS |
| 中文描述： | 低壓CHMOS單片8位微控制器 |
| 文件頁數(shù)： | 6/20頁 |
| 文件大?。?/td> | 284K |
| 代理商： | 8XL54 |
8XL52/54/58
POWER DOWN MODE
To save even more power, a Power Down mode can
be invoked by software. In this mode, the oscillator
is stopped and the instruction that invoked Power
Down is the last instruction executed. The on-chip
RAM and Special Function Registers retain their val-
ues until the Power Down mode is terminated.
On the 8XL5X either hardware reset or external in-
terrupt can cause an exit from Power Down. Reset
redefines all the SFRs but does not change the on-
chip RAM. An external interrupt allows both the
SFRs and the on-chip RAM to retain their values.
To properly terminate Power Down the reset or ex-
ternal interrupt should not be executed before V
CC
is
restored to its normal operating level and must be
held active long enough for the oscillator to restart
and stabilize (normally less than 10 ms).
With an external interrupt, INT0 or INT1 must be en-
abled and configured as level-sensitive. Holding the
pin low restarts the oscillator but bringing the pin
back high completes the exit. Once the interrupt is
serviced, the next instruction to be executed after
RETI will be the one following the instruction that put
the device into Power Down.
DESIGN CONSIDERATION
#
The 8XL5X will operate from 2.7V to 3.6V with a
frequency range of 3.5 MHz to 16 MHz (Ex-
press)/20 MHz (Commercial). Operating beyond
these specifications could cause improper device
functionality.
#
All V
CC
and V
SS
pins must be connected. Please
refer to Figure 2, Pin Connections, for the specific
pins.
#
When the idle mode is terminated by a hardware
reset, the device normally resumes program exe-
cution, from where it left off, up to two machine
cycles before the internal reset algorithm takes
control. On-chip hardware inhibits access to inter-
nal RAM in this event, but access to the port pins
is not inhibited. To eliminate the possibility of an
unexpected write when Idle is terminated by re-
set, the instruction following the one that invokes
Idle should not be one that writes to a port pin or
to external memory.
ONCE MODE
The ONCE (‘‘On-Circuit Emulation’’) Mode facilitates
testing and debugging of systems using the 8XL5X
without the 8XL5X having to be removed from the
circuit. The ONCE Mode is invoked by:
1) Pull ALE low while the device is in reset and
PSEN is high;
2) Hold ALE low as RST is deactivated.
While the device is in ONCE Mode, the Port 0 pins
float, and the other port pins and ALE and PSEN are
weakly pulled high. The oscillator circuit remains ac-
tive. While the 8XL5X is in this mode, an emulator or
test CPU can be used to drive the circuit. Normal
operation is restored when a normal reset is applied.
Table 1. Status of the External Pins during Idle and Power Down
Mode
Program
Memory
ALE
PSEN
PORT0
PORT1
PORT2
PORT3
Idle
Internal
1
1
Data
Data
Data
Data
Idle
External
1
1
Float
Data
Address
Data
Power Down
Internal
0
0
Data
Data
Data
Data
Power Down
External
0
0
Float
Data
Data
Data
NOTE:
For more detailed information on the reduced power modes refer to current Embedded Microcontrollers and Processors
Handbook Volume I,
Y
270646, and Application Note AP-252 (Embedded Applications Handbook),
Y
270648, ‘‘Designing
with the 80C51BH.’’
6
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