參數(shù)資料
型號: 8N3Q001EG-204LCDI8
廠商: IDT, Integrated Device Technology Inc
文件頁數(shù): 12/21頁
文件大?。?/td> 0K
描述: IC CLCK OSC QUAD FREQUENCY 5X7
特色產(chǎn)品: Fourth-generation FemtoClock for VCXO
標準包裝: 1
系列: FemtoClock® NG
類型: 時鐘振蕩器
頻率: 可調(diào)節(jié)/可選擇
電源電壓: 2.375 V ~ 3.465 V
電流 - 電源: 150mA
工作溫度: -40°C ~ 85°C
封裝/外殼: 10-CLCC
包裝: 標準包裝
供應(yīng)商設(shè)備封裝: 10-CLCC
安裝類型: 表面貼裝
其它名稱: 800-2571-6
IDT8N3Q001 REV G Data Sheet
QUAD-FREQUENCY PROGRAMMABLE-XO
IDT8N3Q001GCD REVISION A MARCH 6, 2012
2
2012 Integrated Device Technology, Inc.
Table 1. Pin Descriptions
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Table 2. Pin Characteristics
Function Tables
Table 3A. OE Configuration
NOTE: OE is an asynchronous control.
Table 3B. Output Frequency Range
NOTE: Supported output frequency range. The output frequency
can be programmed to any frequency in this range and to a precision
of 218Hz or better.
Number
Name
Type
Description
1
DNU
Unused
Do not use.
2
OE
Input
Pullup
Output enable pin. See Table 3 for function. LVCMOS/LVTTL interface
levels.
3VEE
Power
Negative power supply.
5, 4
FSEL1, FSEL0
Input
Pulldown
Default frequency select pins. See the Default Frequency Order Codes
section. LVCMOS/LVTTL interface levels.
6, 7
Q, nQ
Output
Differential clock output. LVPECL interface levels.
8
VCC
Power
Power supply pin.
9
SDATA
Input/Output
Pullup
I2C Data Input/Output. Input: LVCMOS/LVTTL compatible interface levels.
Output: Open drain.
10
SCLK
Input
Pullup
I2C Clock Input. LVCMOS/LVTTL compatible interface levels.
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
CIN
Input Capacitance
5.5
pF
RPULLUP
Input Pullup Resistor
50
k
RPULLDOWN Input Pulldown Resistor
50
k
Input
Output Enable
OE
0
Outputs Q, nQ are in high-impedance state.
1 (default)
Outputs are enabled.
15.476MHz to 866.67MHz
975MHz to 1,300MMHz
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