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July 19, 2007
2007 Integrated Device Technology, Inc.
DSC 6925
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
Devic e Overview
The 89HPES48H12 is a member of the IDT PRECISE famly of
PCI Expressswitching solutions. The PES48H12 is a 48-lane, 12-port
systeminterconnect switch optimzed for PCI Express packet switching
in high-performance applications, supporting multiple simultaneous
peer-to-peer traffic flows. Target applications include servers, storage,
communications, and embedded systems.
Features
High Performance PCI Express Switch
–
Twelve maximumswitch ports
Six main ports each of which consists of 8 SerDes
Each x8 main port can further bifurcate to 2 x4-ports
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Forty-eight 2.5 Gbps embedded SerDes
Supports pre-emphasis and receive equalization on per-port
basis
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Delivers 192 Gbps (24 GBps) of aggregate switching capacity
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Low-latency cut-through switch architecture
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Support for Max Payload Size up to 2048 bytes
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Supports two virtual channels and eight traffic classes
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PCI Express Base Specification Revision 1.1 compliant
◆
Flexible Architecture with Numerous Configuration Options
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Port arbitration schemes utilizing round robin algorithms
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Virtual channels arbitration based on priority
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Automatic per port link width negotiation to x8, x4, x2 or x1
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Supports automatic lane reversal on all ports
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Supports automatic polarity inversion on all lanes
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Supports locked transactions, allowing use with legacy soft-
ware
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Ability to load device configuration fromserial EEPROM
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Ability to control device via SMBus
◆
Highly Integrated Solution
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Requires no external components
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Incorporates on-chip internal memory for packet buffering and
queueing
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Integrates forty-eight 2.5 Gbps embedded full duplex SerDes,
8B/10B encoder/decoder (no separate transceivers needed)
◆
Reliability, Availability, and Serviceability (RAS) Features
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Redundant upstreamport failover capability
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Supports optional PCI Express end-to-end CRC checking
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Internal end-to-end parity protection on all TLPs ensures data
integrity even in systems that do not implement end-to-end
CRC (ECRC)
Block Diagram
Figure 1 Internal Block Diagram
48 PCI Express Lanes
Up to 6 x8 ports or 12 x4 Ports
12-Port Switch Core
Frame Buffer
Route Table
Port
Arbitration
Scheduler
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
DL/Transaction Layer
SerDes
x8/x4/x2/x1
89HPES48H12
Data Sheet
48-Lane 12-Port PCI Express
System Interconnect Switch