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參數(shù)資料
| 型號： | 87C754 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-bit microcontroller family 4K/256 OTP/ROM, DAC, comparator, UART, reference |
| 中文描述： | 80C51的8位單片機(jī)系列4K/256檢察官辦公室/光盤，援，比較，異步，參考 |
| 文件頁數(shù)： | 10/26頁 |
| 文件大?。?/td> | 217K |
| 代理商： | 87C754 |
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Philips Semiconductors
Preliminary specification
83C754/87C754
80C51 8-bit microcontroller family
4K/256 OTP/ROM, DAC, comparator, UART, reference
1998 Apr 23
10
COUNTER/TIMER
The 8XC754 counter/timers are designated Timer 0 and 1. They are
identical to the 80C51 counter/timers. (Timer 1 shares its interrupt
with the serial port.)
Programmable Counter Array (PCA)
The Programmable Counter Array is a special Timer that has one
16-bit capture/compare module associated with it. The module can
be programmed to operate in one of four modes: rising and/or falling
edge capture, software timer, high-speed output, or pulse width
modulator. The basic PCA configuration is shown in Figure 5.
The PCA timer can be programmed to run at: 1/12 the oscillator
frequency, 1/4 the oscillator frequency, the Timer 0 overflow, or the
input on the ECI pin (P3.1). The timer count source is determined
from the CPS1 and CPS0 bits in the CMOD SFR as follows (see
Figure 8):
CPS1 CPS0 PCA Timer Count Source
0
0
1/12 oscillator frequency
0
1
1/4 oscillator frequency
1
0
Timer 0 overflow
1
1
External Input at ECI pin
In the CMOD SFR are three additional bits associated with the PCA.
They are CIDL which allows the PCA to stop during idle mode,
WDTE which enables or disables the watchdog function, and ECF
which when set causes an interrupt and the PCA overflow flag, CF
(in the CCON SFR) to be set when the PCA timer overflows. These
functions are shown in Figure 6.
The watchdog timer function is implemented in module 4 as
implemented in other parts that have a PCA that are available on the
market.
The CCON SFR contains the run control bit for the PCA and the
flags for the PCA timer (CF) and module (refer to Figure 9). To run
the PCA the CR bit (CCON.6) must be set by software. The PCA is
shut off by clearing this bit. The CF bit (CCON.7) is set when the
PCA counter overflows and an interrupt will be generated if the ECF
bit in the CMOD register is set, The CF bit can only be cleared by
software. Bit 4 of the CCON register is the flag for the module and is
set by hardware when either a match or a capture occurs. This flag
can only be cleared by software. The PCA interrupt system shown in
Figure 7.
The CCAPM register contains the bits that control the mode in which
the module will operate. The ECCF bit enables the CCF flag in the
CCON SFR to generate an interrupt when a match or compare
occurs in the associated module. PWM (CCAPM.1) enables the
pulse width modulation mode. The TOG bit (CCAPM.2) when set
causes the CEX output associated with the module to toggle when
there is a match between the PCA counter and the module’s
capture/compare register. The match bit MAT (CCAPM.3), when set,
will cause the CCF bit in the CCON register to be set when there is
a match between the PCA counter and the module’s
capture/compare register.
The next two bits CAPN (CCAPM.4) and CAPP (CCAPM.5)
determine the edge that a capture input will be active on. The CAPN
bit enables the negative edge, and the CAPP bit enables the
positive edge. If both bits are set both edges will be enabled and a
capture will occur for either transition. The last bit in the register
ECOM (CCAPM.6) when set enables the comparator function.
Figure 11 shows the CCAPM settings for the various PCA functions.
There are two additional registers associated with the PCA module.
They are CCAPH and CCAPL and these are the registers that store
the 16-bit count when a capture occurs or a compare should occur.
When the module is used in the PWM mode these registers are
used to control the duty cycle of the output.
PCA Capture Mode
To use the PCA module in the capture mode, either one or both of
the CCAPM bits CAPN and CAPP must be set. The external CEX
input for the module is sampled for transition. When a valid transition
occurs, the PCA hardware loads the value of the PCA counter
registers (CH and CL) into the module’s capture registers (CCAPL
and CCAPH). If the CCF bit for the module in the CCON SFR and
the ECCF bit in the CCAPM SFR are set, then an interrupt will be
generated. Refer to Figure 12.
16-bit Software Timer Mode
The PCA modules can be used as software timers by setting both
the ECOM and MAT bits in the module’s CCAPM register. The PCA
timer will be compared to the module’s capture registers and when a
match occurs an interrupt will occur if the CCF (CCON SFR) and the
ECCF (CCAPM SFR) bits for the module are both set (see
Figure 13).
High Speed Output Mode
In this mode the CEX output associated with the PCA module will
toggle each time a match occurs between the PCA counter and the
module’s capture registers. To activate this mode the TOG, MAT,
and ECOM bits in the module’s CCAPM SFR must be set (see
Figure 14).
Pulse Width Modulator Mode
The PCA module can be used as a PWM output. Figure 15 shows
the PWM function. The frequency of the output depends on the
source for the PCA timer. The duty cycle of the module is
independently variable using the module’s capture register CCAPL.
When the value of the PCA CL SFR is less than the value in the
module’s CCAPL SFR, the output will be low, when it is equal to or
greater than the output will be high. When CL overflows from FF to
00, CCAPL is reloaded with the value in CCAPH. This allows
updating the PWM without glitches. The PWM and ECOM bits in the
module’s CCAPM register must be set to enable the PWM mode.
MODULE FUNCTIONS:
16-BIT CAPTURE
16-BIT TIMER
16-BIT HIGH SPEED OUTPUT
8-BIT PWM
WATCHDOG TIMER
PCA MODULE
P1.1/CEX
16 BITS
PCA TIMER/COUNTER
TIME BASE FOR PCA MODULES
16 BITS
SU00672B
Figure 5. Programmable Counter Array (PCA)
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