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參數(shù)資料
| 型號(hào)： | 87C748 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-bit microcontroller family 2K/64 OTP/ROM, low pin count |
| 中文描述： | 80C51的8位單片機(jī)系列2K/64檢察官辦公室/光盤，低接腳數(shù) |
| 文件頁(yè)數(shù)： | 4/18頁(yè) |
| 文件大?。?/td> | 147K |
| 代理商： | 87C748 |
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Philips Semiconductors
Preliminary specification
83C748/87C748
80C51 8-bit microcontroller family
2K/64 OTP/ROM, low pin count
1999 Apr 15
4
PIN DESCRIPTIONS
PIN NO.
DIP/
SSOP
12
24
MNEMONIC
LCC
TYPE
NAME AND FUNCTION
V
SS
V
CC
P0.0–P0.2
14
28
I
I
Circuit Ground Potential
Supply voltage during normal, idle, and power-down operation.
Port 0:
Port 0 is a 3-bit open-drain, bidirectional port. Port 0 pins that have 1s written to them float,
and in that state can be used as high-impedance inputs. These pins are driven low if the port register
bit is written with a 0. The state of the pin can always be read from the port register by the program.
P0.0 and P0.1 are open drain bidirectional I/O pins. While these differ from “standard TTL”
characteristics, they are close enough for the pins to still be used as general-purpose I/O. Port 0
also provides alternate functions for programming the EPROM memory as follows:
V
PP
(P0.2) –
Programming voltage input. (See Note 1).
OE/PGM (P0.1) –
Input which specifies verify mode (output enable) or the program mode.
OE/PGM = 1 output enabled (verify mode).
OE/PGM = 0 program mode.
ASEL (P0.0) –
Input which indicates which bits of the EPROM address are applied to port 3.
ASEL = 0 low address byte available on port 3.
ASEL = 1 high address byte available on port 3 (only the three least significant bits are used).
8–6
9–7
I/O
6
7
7
8
N/A
I
8
9
I
P1.0–P1.7
13–20
15–20,
23, 24
I/O
Port 1:
Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have 1s written
to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 1 pins
that are externally pulled low will source current because of the internal pull-ups. (See DC Electrical
Characteristics: I
). Port 1 serves to output the addressed EPROM contents in the verify mode and
accepts as inputs the value to program into the selected address during the program mode. Port 1
also serves the special function features of the 80C51 family as listed below:
INT0 (P1.5):
External interrupt.
INT1 (P1.6):
External interrupt.
T0 (P1.7):
Timer 0 external input.
Port 3:
Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have 1s written
to them are pulled high by the internal pull-ups and can be used as inputs. As inputs, port 3 pins
that are externally being pulled low will source current because of the pull-ups. (See DC Electrical
Characteristics: I
). Port 3 also functions as the address input for the EPROM memory location to be
programmed (or verified). The 11-bit address is multiplexed into this port as specified by P0.0/ASEL.
18
19
20
20
23
24
I
I
I
P3.0–P3.7
5–1,
23–21
6, 4–1,
27–25
I/O
RST
9
11
I
Reset:
A high on this pin for two machine cycles while the oscillator is running, resets the device.
An internal diffused resistor to V
SS
permits a power-on RESET using only an external capacitor to
V
. After the device is reset, a 10-bit serial sequence, sent LSB first, applied to RESET, places
the device in the programming state allowing programming address, data and V
PP
to be applied for
programming or verification purposes. The RESET serial sequence must be synchronized with the
X1 input.
Crystal 1:
Input to the inverting oscillator amplifier and input to the internal clock generator circuits.
X1 also serves as the clock to strobe in a serial bit stream into RESET to place the device in the
programming state.
X1
11
13
I
X2
NOTE:
1. When P0.2 is at or close to 0 volts, it may affect the internal ROM operation. It is recommended that P0.2 be tied to V
CC
via a small pull-up
(e.g. 2k ).
ABSOLUTE MAXIMUM RATINGS
1, 2
PARAMETER
10
12
O
Crystal 2:
Output from the inverting oscillator amplifier.
RATING
UNIT
Storage temperature range
–65 to +150
°
C
Voltage from V
CC
to V
SS
Voltage from any pin to V
SS
(except V
PP
)
Power dissipation
–0.5 to +6.5
V
–0.5 to V
CC
+ 0.5
1.0
V
W
Voltage on V
PP
pin to V
SS
Maximum I
OL
per I/O pin
NOTES:
1. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any conditions other than those described in the AC and DC Electrical Characteristics section
of this specification is not implied.
2. This product includes circuitry specifically designed for the protection of its internal devices from the damaging effects of excessive static
charge. Nonetheless, it is suggested that conventional precautions be taken to avoid applying greater than the rated maxima.
0 to +13.0
V
10
mA
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