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參數(shù)資料
| 型號： | 87C524 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer |
| 中文描述： | 80C51的8位微控制器16K/32K，512檢察官辦公室和I2C，看門狗定時器 |
| 文件頁數(shù)： | 9/26頁 |
| 文件大?。?/td> | 186K |
| 代理商： | 87C524 |
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Philips Semiconductors
Product specification
87C524/87C528
80C51 8-bit microcontrollers
16K/32K, 512 OTP, I
2
C, watchdog timer
1999 Jul 23
9
Additionally, if acting as master:
– generating START and STOP conditions
– handling bus arbitration
– generating serial clock pulses if S1BIT is not used.
Three SFRs control the bit-level I
2
C interface: S1INT, S1BIT and
S1SCS.
INTERRUPT SYSTEM
The interrupt structure of the 8XC528 is the same as that used in the
80C51, but includes two additional interrupt sources: one for the
third timer/counter, T2, and one for the I
2
C interface. The interrupt
enable and interrupt priority registers are IE and IP.
IE: Interrupt Enable Register
This register is located at address A8H. Refer to Table 3.
IE SFR (A8H)
7
6
5
4
3
2
1
0
EA
ES1
ET2
ES
ET1
EX1
ET0
EX0
IP: Interrupt Priority Register
This register is located at address B8H. Refer to Table 4.
IP SFR (B8H)
7
6
5
4
3
2
1
0
–
PS1
PT2
PS
PT1
PX1
PT0
PX0
Table 3.
Description of IE Bits
MNEMONIC
BIT
FUNCTION
EA
IE.7
General enable/disable control:
0 =
NO
interrupt is enabled.
1 =
ANY
individually enabled interrupt will be accepted.
ES1
IE.6
Enable
bit-level I
2
C I/O
interrupt
Enable
Timer 2
interrupt
ET2
IE.5
ES
IE.4
Enable
Serial Port
interrupt
ET1
IE.3
Enable
Timer 1
interrupt
EX1
IE.2
Enable
External
interrupt 1
ET0
IE.1
Enable
Timer 0
interrupt
EX0
IE.0
Enable
External
interrupt 0
Table 4.
Description of IP Bits
MNEMONIC
BIT
FUNCTION
–
IP.7
Reserved.
Bit-level I
2
C
interrupt priority level
PS1
IP.6
PT2
IP.5
Timer 2
interrupt priority level
PS
IP.4
Serial Port
interrupt priority level
PT1
IP.3
Timer 1
interrupt priority level
PX1
IP.2
External Interrupt 1
priority level
PT0
IP.1
Timer 0
interrupt priority level
PX0
IP.0
External Interrupt 0
priority level
The interrupt vector locations and the interrupt priorities are:
Source
Vector
0003H
002BH
0053H
000BH
0013H
001BH
0023H
Priority within Level
Address
IE0
TF2+EXF2
SI (I
2
C)
TF0
IE1
TF1
RI+TI
Highest
Lowest
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 87C528 | 80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer |
| 87C529 | 80C51 9-bit microcontrollers(80C51 9位微控制器) |
| 87C52X2 | 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz |
| 87C31X2 | 80C51 8-bit microcontroller family 4K/8K/16K/32K ROM/OTP 128B/256B RAM low voltage 2.7 to 5.5 V, low power, high speed 30/33 MHz |
| 87C52 | 80C51 8-bit microcontroller family 8K.64K/256.1K OTP/ROM/ROMless, low voltage 2.7V.5.5V, low power, high speed 33 MHz |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 87C528 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:80C51 8-bit microcontrollers 16K/32K, 512 OTP, I2C, watchdog timer |
| 87C528/BMA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| 87C528/BQA | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| 87C52EBAA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontrollers |
| 87C52EBFFA | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:CMOS single-chip 8-bit microcontrollers |
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