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參數(shù)資料
| 型號(hào)： | L64780 |
| 廠商： | LSI Corporation |
| 英文描述： | DVB-T COFDM Demodulator(對地?cái)?shù)字視頻廣播 正交編碼頻率分割多路處理解調(diào)器) |
| 中文描述： | 的DVB - T COFDM解調(diào)器（對地?cái)?shù)字視頻廣播正交編碼頻率分割多路處理解調(diào)器） |
| 文件頁數(shù)： | 89/126頁 |
| 文件大?。?/td> | 953K |
| 代理商： | L64780 |
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Mode Register Address Line 0x19
4-37
SD_CTRL
Normal Output 3-State Controller
When this bit is 1, all Normal pins are 3-stated. The initial
condition for this bit is 0, normal mode.
R/W 4
MUX_CTRL
MUXOUT 3-State Controller
When this bit is 1, all MUXOUT pins are 3-stated. The
initial condition for this bit is 0, normal mode.
R/W 3
SOFT_RESET Chip Soft Reset
Setting this bit enables a hard reset of the L64780 logic
(except the OBC registers, which keep their values). This
allows a proper reset of the chip in any default
configuration (memories are also reset to 0). Note that
the Soft Reset must be asserted from the external
microcontroller; it is not a pulse. When this bit is 1, soft
reset is enabled. When this bit is 0, no soft reset is
possible.
R/W 2
AUTO_MODE_ENABLE
TPS Auto Updating
This bit determines if the TPS updating is controlled by
the external microcontroller, or if the Active registers are
automatically updated each time new value TPS arrive
from the Broadcaster.
R/W 1
If this bit is 1, the current mode (as defined by the TPS
register) of the demodulator is updated whenever a valid
TPS is received.
If this bit is 0, manual configuration of the TPS register is
required.
The initial condition for this bit is 0, Manual Update.
CHANGE_MODE
TPS Updating Register
When a new mode of operation has been written into the
TPS register, writing the value 1 into this location causes
the demodulator to change mode. See
Section 4.3, “TPS
Registers,” page 4-11
for more information.
W 0
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相關(guān)代理商/技術(shù)參數(shù) |
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| L64781 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Single-Chip COFDM Receiver |
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| L64801GC-25 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:32-Bit Microprocessor |
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