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參數(shù)資料
| 型號(hào)： | 853S12AKILF |
| 廠商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分類(lèi)： | 時(shí)鐘及定時(shí) |
| 英文描述： | 853S SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 封裝： | 5 MM X 5 MM, 0.925 MM HEIGHT, ROHS COMPLIANT, MO-220VHHD-2, VFQFN-32 |
| 文件頁(yè)數(shù)： | 13/17頁(yè) |
| 文件大?。?/td> | 328K |
| 代理商： | 853S12AKILF |
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IDT / ICS LVPECL FANOUT BUFFER
5
ICS853S12AKI REV. A MAY 21, 2008
ICS853S12I
LOW SKEW, 1-TO-12, DIFFERENTIAL-TO-3.3V, 2.5V LVPECL FANOUT BUFFER
ADDITIVE PHASE JITTER
Additive Phase Jitter
622MHz (12kHz to 20MHz) = 0.06ps typical
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is called
the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise power
present in a 1Hz band at a specified offset from the fundamental
frequency to the power value of the fundamental. This ratio is
expressed in decibels (dBm) or a ratio of the power in the 1Hz
As with most timing specifications, phase noise measurements
has issues relating to the limitations of the equipment. Often the
noise floor of the equipment is higher than the noise floor of the
band to the power in the fundamental. When the required offset
is specified, the phase noise is called a
dBc value, which simply
means dBm at a specified offset from the fundamental. By
investigating jitter in the frequency domain, we get a better
understanding of its effects on the desired application over the
entire time record of the signal. It is mathematically possible to
calculate an expected bit error rate given a phase noise plot.
device. This is illustrated above. The device meets the noise floor
of what is shown, but can actually be lower. The phase noise is
dependent on the input source and measurement equipment.
OFFSET FROM CARRIER FREQUENCY (HZ)
SSB
P
HASE
N
OISE
dB
c
/H
Z
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 853S12AKILFT | 853S SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 853S12AKIT | 853S SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 853S12AKI | 853S SERIES, LOW SKEW CLOCK DRIVER, 12 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC32 |
| 8550D | 1500 mA, 25 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92 |
| 8550C | 1500 mA, 25 V, PNP, Si, SMALL SIGNAL TRANSISTOR, TO-92 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| 853S12AKILFT | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 853S310AVILF | 制造商:Integrated Device Technology Inc 功能描述:CLOCK DRVR - Rail/Tube |
| 853S310CVILF | 制造商:Integrated Device Technology Inc 功能描述:CLOCK DRVR - Rail/Tube |
| 853S314AFILF | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
| 853S314AFILFT | 功能描述:時(shí)鐘驅(qū)動(dòng)器及分配 RoHS:否 制造商:Micrel 乘法/除法因子:1:4 輸出類(lèi)型:Differential 最大輸出頻率:4.2 GHz 電源電壓-最大: 電源電壓-最小:5 V 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-8 封裝:Reel |
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